2013
DOI: 10.1109/led.2013.2285702
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Novel Cu-to-Cu Bonding With Ti Passivation at 180$^{\circ}{\rm C}$ in 3-D Integration

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Cited by 90 publications
(32 citation statements)
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“…Alternatively, Chen et.al. proposed a novel wafer-level Cu-Cu bonding using Ti as the passivation layer on Cu surface at 180 ˚C and 1.91 MPa pressure by keeping eye on CMOS in-line process flow [29]. However, application of such a high pressure condition during bonding may damage the delicate underneath Cu interconnect and seriously affect the system performance.…”
Section: Introductionmentioning
confidence: 99%
“…Alternatively, Chen et.al. proposed a novel wafer-level Cu-Cu bonding using Ti as the passivation layer on Cu surface at 180 ˚C and 1.91 MPa pressure by keeping eye on CMOS in-line process flow [29]. However, application of such a high pressure condition during bonding may damage the delicate underneath Cu interconnect and seriously affect the system performance.…”
Section: Introductionmentioning
confidence: 99%
“…In order to lower the bonding temperature, many studies focused on how to improve the planarization of the bonding surface, including ultra-precision cutting proposed by T. Sakai 11 and direct bond interconnect (DBI) proposed by P. Enguist. 12 Other researchers protected Cu bonding surface from oxidation and contamination by Ti passivation, 13 self-assembled monolayer (SAM), 14 or surface activated bonding (SAB) technique. 17,18 However, almost all the low temperature bonding techniques were quite time-consuming (over 30min) at either pre-bonding stage or post-annealing stage.…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, it is necessary to develop a low-temperature Cu bonding scheme with excellent and reliable performance. In [7], Ti passivation layer on the Cu surface was proposed to protect Manuscript Cu from oxidation before the bonding process. This bond structure can successfully be achieved at the low temperature of 180°C.…”
Section: Introductionmentioning
confidence: 99%
“…In addition, only chip-level, not wafer-level, Cu bonding with Ti passivation is demonstrated [7]. In this paper, in wafer-level, Pd is used as another passivation material to protect Cu because of its material properties [8], [9].…”
Section: Introductionmentioning
confidence: 99%