Notes on &quotA Novel Conversion Scheme from a Redundant Binary Number to Two's Complement Binary Number for Parallel Architectures&quot proposed by Choo et. al.

Abstract

In this article, it is shown that although the reverse conversion scheme for binary signed-digit number system proposed by Choo et. al. can not support full parallelism; the rules on which it is based are correct. In this connection, a mathematical induction technique is used to validate the decomposition rules. Accordingly, it can be inferred that the reverse conversion scheme for binary signed-digit number system proposed by Veeramachaneni et. al. works correctly and performs reverse conversion in Ω (log n) time, where, n is the input size. As a consequence, the scheme by Veeramachaneni et. al. need to be considered as a potential contender of the more recent schemes for the same.

A Review of Electrode Manufacturing Methods for Electrical Discharge Machining: Current Status and Future Perspectives for Surface Alloying

“…They obtained a microhardness value of 1800 HV on the deposited surface, which was significantly higher than the original surface's microhardness of 155 HV. Additionally, Chakraborty et al [112] successfully carried out EDC on Al-6351 using a SiC-Cu P/M green compact tool, increasing the hardness of the recast layer by 1.5 to 3 times compared with the hardness of the original metal. Using the EDC technique and a MoS 2 -Cu P/M green compact tool electrode, Tyagi et al [69] conducted a study in which they created a self-lubricating surface on mild steel, resulting in a decrease in the microhardness of the deposited layer to 45.49-114 HV from the base metal's 180 HV and a reduction in average wear to a minimum value of 4.56 µm as opposed to 95.61 µm on the deposited layer.…”