Nonvolatile Nanoelectromechanical Memory Switches for Low-Power and High-Speed Field-Programmable Gate Arrays

Abstract

The application of nanoelectromechanical (NEM) memory switches to field-programmable gate arrays (FPGAs) has been proposed for the first time. NEM memory switches replace MOSFETs and NEM relay switches in connection blocks and switch boxes. The proposed NEM-memory-based FPGAs feature higher speed, lower energy consumption, and smaller chip area than the other FPGAs. In addition, compared with the previously reported NEM-relay-based FPGAs, they show nonvolatile storage of signal paths and stable rail-to-rail signal voltage swing because data signal paths are maintained by adhesion force. In addition, the contact resistance (R co ) of a NEM memory switch is lower than that of a NEM relay switch thanks to larger contact area.Index Terms-Adhesion force, nanoelectromechanical (NEM) memory switch, nonvolatile operation, reconfigurable logic.

Tri-State Nanoelectromechanical Memory Switches for the Implementation of a High-Impedance State

“…1(a) [1]. On the contrary, the previously proposed NEM memory routing switches had only binary states with a low impedance: states 1 and 2 [11]; Fig. 1(b) shows their operating mechanism.…”

“…The proposed tri-state NEM memory switches are analogous to binary-state NEM memory switches as presented in [11]- [14]. The three terminal structure is maintained considering the size and fabrication of NEM memory switches.…”

Dynamic Slingshot Operation for Low-Operation- Voltage Nanoelectromechanical (NEM) Memory Switches

“…Fig. 1 shows the conceptual view of our previously proposed monolithic-three-dimensional (M3D) CMOS-NEM hybrid RL circuit and NEM memory switch [7], [8]. As NEM memory switches can be integrated with metal…”

“…interconnection layers using the CMOS backend process, CMOS-NEM hybrid RL circuits achieve higher chip density, higher performance, and lower power consumption than CMOS-only circuits [7]- [12]. These merits make the NEM memory switch as attractive as the routing switch.…”

“…Subsequently, to toggle between states 1 and 2, the applied voltage should exceed the switching voltage (V s ). More details on the conventional operation of NEM memory switches have been presented in prior studies [7]. One of the most critical problems of M3D CMOS-NEM hybrid RL circuits is the high operation voltage (V DD ) of the NEM memory switches [8], [13].…”