Nonlinear-Embedding Design Methodology Oriented to LDMOS Power Amplifiers

Bosi, Gianni; Raffo, Antonio; Trevisan, F.; Vadalà, Valeria; Crupi, Giovanni; Vannini, G.

doi:10.1109/tpel.2017.2783046

Cited by 19 publications

(10 citation statements)

References 49 publications

(60 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…where Z L1 is the fundamental frequency drain load impedance and is composed from real and imaginary parts where Z L1 = R L1 + jX L1 , Z L2 is the drain load impedance at the second harmonic frequency and contains only a reactive part where Z L2 = jX L2 , and Z L3 is the load impedance for the third harmonic and is given as Z L3 = jX L3 . The second and third harmonic load impedances are purely reactive with no resistive parts in order to prevent power dissipation in the harmonics which is a necessary condition for maximizing efficiency [10]. The intrinsic capacitance, C ds , is a large signal parameter that does change with the signal level at the virtual drain.…”

Section: Characterization Of the Rf Power Device For Inverse Class-f Operationmentioning

confidence: 99%

An Analytic Design Approach to Inverse Class-F RF Power Amplifiers

Ali

Al-Muifraje

Saeed

2020

ETJ

View full text Add to dashboard Cite

The design of high efficiency inverse class-F (class-F-1) radio frequency (RF) power amplifiers includes extensive measurements to characterize the RF power device by means of the empirical load-pull test setup. This paper presents an alternative characterization approach based on evaluating the load impedances analytically at the desired harmonic frequencies for a high electron mobility transistor (HEMT) in terms of the internal and package elements of the active device. It additionally provides a method for extracting the parasitic elements of the power device as well as determining the optimum load-line resistance using the transistor manufacturer’s large signal model. A new topology for the output matching circuit is also proposed with its synthetic procedure to present the appropriate harmonic load impedances. To verify this methodology, a 900 MHz inverse class-F power amplifier circuit was designed and its performance was tested with the aid of the Keysight ADS software. The simulation results showed an output power of 38 dBm, a power gain of about 13 dB, DC-to-RF efficiency greater than 87%, and an acceptable level of linearity for both GSM and CDMA modulated signals.

show abstract

Section: Characterization Of the Rf Power Device For Inverse Class-f Operationmentioning

confidence: 99%

An Analytic Design Approach to Inverse Class-F RF Power Amplifiers

Ali

Al-Muifraje

Saeed

2020

ETJ

View full text Add to dashboard Cite

show abstract

“…For these reasons, the GaN-based HEMT has become mainstream in many power amplifier designs, 4,5 particularly where required high power densities is not available from competing metal-oxide-semiconductor (MOS) technology (eg, LDMOS). 6 Although GaN devices exhibit superior performance, their electrical characteristics are complex, 7,8 and therefore extracting optimal performance from the device is not straightforward. Furthermore, while there has been significant recent research interest in device models for GaN-based devices, it remains true that the current modeling state-of-the-art for GaN devices has not reached the same level as exits for other device technologies.…”

Section: Introductionmentioning

confidence: 99%

Modified small‐signal behavioral model for GaN HEMTs based on support vector regression

Geng

Cai

King

et al. 2021

Int J RF Microw Comput Aided Eng

View full text Add to dashboard Cite

A novel, modified small signal behavioral modeling methodology for gallium nitride (GaN) high electron-mobility transistors (HEMTs), based on the support vector regression (SVR) technique, is presented in this paper. Compared with the classic equivalent small-signal circuit model, the proposed model adds an error correction technique, which is developed using SVR techniques. The proposed model maintains accuracy across a broad frequency range, from 1 GHz to 10 GHz. The verification is performed through comparisons with measured multibias S-parameter data performed on an 8 Â 125 μm GaN HEMT device with a 0.25 μm gate feature size. The modified model shows a significant improvement in S-parameter prediction accuracy when compared with the classic equivalent circuit modeling approach.

show abstract

“…N recent years, the progress of an ultra-high voltage (UHV) process technology has developed vigorously, UHV LDMOS power devices have scaled from discrete components to integrated circuits and has been widely used in power electronics, switching-mode power supply (SMPS), and power management circuits [1]- [3]. However, the ESD damage has been seriously impacted when UHV LDMOS components (supply voltage higher than 100V) integrated into smart power integrated circuits (PICs).…”

Section: Introductionmentioning

confidence: 99%

Enhance the ESD Ability of UHV 300-V Circular LDMOS Components by Embedded SCRs and the Robustness P-Body Well

Lin

Chen

Fan

2021

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

The ultra-high voltage (UHV) Lateral-diffused MOSFET (LDMOS) transistor has been widely used in power circuit applications, and has often used as an electrostatic discharge (ESD) self-protection device. However, the ESD ability of an UHV LDMOS is generally worse than that of low-and high-voltage (HV) devices, so that this UHV LDMOS device can be easily failed under an ESD event. Then, the method of embedding a silicon-controlled rectifier (SCR) into the HV LDMOS has been used in the HV circuit as an ESD protection technique. But when this architecture is applied to UHV devices, will its ESD capability be as good as in HV devices? A novel SCR plus a P-body well architecture is proposed, which can effectively enhance the ESD ability of the UHV nLDMOS device when the drain side is embedded this new structure. The proposed structure can greatly improve the ESD capability of the device without adding any extra process step, layout area and affecting the basic breakdown voltage. Finally, the proposed structure of the PPP-arranged type with the P-body well can greatly increase the ESD (FOM) ability which I t2 and HBM ability can increase to 68.7% and 22.2% (72.9%), respectively, as compared with the conventional SCR PPP-arranged type.

show abstract

Nonlinear-Embedding Design Methodology Oriented to LDMOS Power Amplifiers

Cited by 19 publications

References 49 publications

An Analytic Design Approach to Inverse Class-F RF Power Amplifiers

An Analytic Design Approach to Inverse Class-F RF Power Amplifiers

Modified small‐signal behavioral model for GaN HEMTs based on support vector regression

Enhance the ESD Ability of UHV 300-V Circular LDMOS Components by Embedded SCRs and the Robustness P-Body Well

Contact Info

Product

Resources

About