Non-volatile Storage

Nanavati, Mihir; Schwarzkopf, Malte; Wires, Jake; Warfield, Andrew

doi:10.1145/2857274.2874238

Cited by 14 publications

(7 citation statements)

References 5 publications

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“…Previous research has acknowledged CPU processes to become the new bottleneck in big data processing pipelines, because I/O bandwidth is increasing [4][5][6][7] [8]. An analysis of this problem specific to Parquet and ORC, and a proposal of an improved format is presented in [9].…”

Section: A Related Workmentioning

confidence: 99%

Battling the CPU Bottleneck in Apache Parquet to Arrow Conversion Using FPGA

Peltenburg

Leeuwen

Hoozemans

et al. 2020

2020 International Conference on Field-Programmable Technology (ICFPT)

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In the domain of big data analytics, the bottleneck of converting storage-focused file formats to in-memory data structures has shifted from the bandwidth of storage to the performance of decoding and decompression software. Two widely used formats for big data storage and in-memory data are Apache Parquet and Apache Arrow, respectively. In order to improve the speed at which data can be loaded from disk to memory, we propose an FPGA accelerator design that converts Parquet files to Arrow in-memory data structures. We describe an extensible, publicly available, free and open-source implementation of the proposed converter that supports various Parquet file configurations. The performance of the converter is measured on an AWS EC2 F1 system and on a POWER9 system using the recently released OpenCAPI interface. A single instance of the converter can reach between 6 and 12 GB/s of end-to-end throughput, and shows up to a threefold improvement over the fastest single-thread CPU implementation. It has a low resource utilization (less than 5% for all types of FPGA resources). This allows scaling out the design to match the bandwidth of the coming generation of accelerator interfaces. The proposed design and implementation can be extended to support more of the many possible Parquet file configurations.

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Section: A Related Workmentioning

confidence: 99%

Battling the CPU Bottleneck in Apache Parquet to Arrow Conversion Using FPGA

Peltenburg

Leeuwen

Hoozemans

et al. 2020

2020 International Conference on Field-Programmable Technology (ICFPT)

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“…Therefore, the software component of the system has been developed as a thread-safe standard C library ("libfnvme") that interfaces with user programs via the API shown in Table I, and has been validated against multithreaded workloads. The library abstracts away 1 Please note that the disk block size is device specific; ranging from 512B to 8KBs in our case. FastPath currently supports only 4KB with future plans to extend it to various block sizes.…”

Section: E Fastpath Api and Programmabilitymentioning

confidence: 99%

“…The majority of the bottlenecks derive from the Operating System (OS) storage I/O software stack (e.g. file system & Direct I/O, Block I/O, NVMe driver), which has been designed and optimized following the traditional assumption that processing cores deliver higher performance than any peripheral I/O device [1].…”

Section: Introductionmentioning

confidence: 99%

FastPath: Towards Wire-Speed NVMe SSDs

Stratikopoulos

Kotselidis

Goodacre

et al. 2018

2018 28th International Conference on Field Programmable Logic and Applications (FPL)

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The constant growth of data and its importance to drive Machine Learning and Big Data is pushing storage systems towards ever increasing I/O bandwidth and lower latency requirements. In recent years, the Non Volatile Memory Express (NVMe) standard has enabled SSD drives to deliver high I/O rates by allowing the storage to be connected directly via the fastest available interconnect to the processing chip. In parallel, the adoption of FPGAs in data centers is creating opportunities to accelerate various applications and/or Operating System (OS) operations. While, FPGAs in data centers have been connected via PCIe to mostly x86 servers, we have now also available heterogeneous SoCs with multi-cores and FPGAs integrated on the same die and connected by an onchip interconnect. In this paper, we present how to rethink and accelerate NVMe performance on heterogeneous SoC with integrated FPGAs providing a first research insight on the performance benefits of such an approach. We provide an analysis of the Linux block I/O layer and showcase the relationship between the system's performance and its I/O implementation. Consequently, we introduce an FPGA-based fast path which accelerates the access to the NVMe drive. Our comparative evaluation demonstrates that our FPGA-based FastPath achieves up to 71% lower latency and up to 5x higher I/O performance against the baseline system on a Zynq development board.

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“…Broadly speaking, HDDs offer lower cost per GB, while SSDs offer better performance, especially for readdominated workloads. Furthermore, emerging technologies provide new tradeoffs: Shingled Magnetic Recording (SMR) disks [69] offer increased capacity compared to HDDs, while Non-Volatile Memories (NVM) [39] offer persistence with performance characteristics close to that of DRAM. At the same time, applications have different requirements and access patterns, and no one-sizefits-all storage solution exists.…”

Section: Introductionmentioning

confidence: 99%

Elevating Commodity Storage with the SALSA Host Translation Layer

Ioannou¹,

Kourtis²,

Koltsidas³

2018

2018 IEEE 26th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS

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To satisfy increasing storage demands in both capacity and performance, industry has turned to multiple storage technologies, including Flash SSDs and SMR disks. These devices employ a translation layer that conceals the idiosyncrasies of their mediums and enables random access. Device translation layers are, however, inherently constrained: resources on the drive are scarce, they cannot be adapted to application requirements, and lack visibility across multiple devices. As a result, performance and durability of many storage devices is severely degraded.In this paper, we present SALSA: a translation layer that executes on the host and allows unmodified applications to better utilize commodity storage. SALSA supports a wide range of single-and multi-device optimizations and, because is implemented in software, can adapt to specific workloads. We describe SALSA's design, and demonstrate its significant benefits using microbenchmarks and case studies based on three applications: MySQL, the Swift object store, and a video server.

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Non-volatile Storage

Cited by 14 publications

References 5 publications

Battling the CPU Bottleneck in Apache Parquet to Arrow Conversion Using FPGA

Battling the CPU Bottleneck in Apache Parquet to Arrow Conversion Using FPGA

FastPath: Towards Wire-Speed NVMe SSDs

Elevating Commodity Storage with the SALSA Host Translation Layer

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