2017
DOI: 10.1016/j.ultramic.2017.03.030
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Non-contact scanning probe technique for electric field measurements based on nanowire field-effect transistor

Abstract: We report on the new active tip for scanning probe microscopy allowing the simultaneous measurements of surface topography and its potential profile. We designed and fabricated a field-effect transistor with nanowire channel located on the apex of silicon-on-insulator small chip. The field-effect transistor with nanowire channel was selected due to its extremely high electric field sensitivity even at room temperature. We developed the scanning probe operated in the tuning fork regime and demonstrated its reas… Show more

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Cited by 18 publications
(10 citation statements)
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References 36 publications
(52 reference statements)
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“…SOI wafers with 110 nm thick upper layer of silicon, separated from the base silicon substrate by a silicon dioxide of 200 nm thick were used for experimental samples fabrication. The technological process is similar to that used to fabrication of sensors based on field-effect transistors with a nanowire channel [19,20,22]. The idea of the method is as follows: a nanoscale wire is cut out in the upper layer of SOI, then it is suspended by removing of silicon oxide separating the upper and lower layers of silicon.…”
Section: Structures Fabrication Detailsmentioning
confidence: 99%
“…SOI wafers with 110 nm thick upper layer of silicon, separated from the base silicon substrate by a silicon dioxide of 200 nm thick were used for experimental samples fabrication. The technological process is similar to that used to fabrication of sensors based on field-effect transistors with a nanowire channel [19,20,22]. The idea of the method is as follows: a nanoscale wire is cut out in the upper layer of SOI, then it is suspended by removing of silicon oxide separating the upper and lower layers of silicon.…”
Section: Structures Fabrication Detailsmentioning
confidence: 99%
“…Conventional SOI wafers with a thickness of the upper silicon layer of 110 nm, separated from the silicon substrate by a layer of the 200 nm-thick silicon oxide were used for the sample fabrication. The fabrica- tion process is similar to that used for sensors based on the field-effect transistors with a nanowire channel [23,25,32] and involved three stages of electronbeam lithography with a positive resist and also reactive ion and wet etchings. The main fabrication stages are shown in Fig.…”
Section: Sample Fabricationmentioning
confidence: 99%
“…It comes as a three-layer wafer, in which the upper thin layer of single-crystal silicon is separated from the base substrate by a thin inter-layer of the silicon oxide. This material is used for the fabrication of field-effect transistors with a nanowire channel [22,23], which became the basis of biosensors for detecting molecules and viruses [24], as well as for nanoscale field charge sensors of an atomic force microscope for monitoring charge dynamics in various structures [25].…”
Section: Introductionmentioning
confidence: 99%
“…Additionally, a probe in which the substrate served as the gate was devised. With the aid of a nanowire field-effect transistor (NWFET), the surface potential of an electrode pattern was imaged in a non-contact manner [20].…”
Section: Introductionmentioning
confidence: 99%