Noise performances in polycrystalline silicon thin-film transistors fabricated by excimer laser crystallization

Carluccio, R.; Corradetti, A.; Fortunato, G.; Reita, C.; Legagneux, Pierre; Plais, F.; Pribat, Didier

doi:10.1063/1.119799

Cited by 21 publications

(8 citation statements)

References 9 publications

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“…On the other hand, in the case of mobility fluctuations in the channel, S I is proportional to I instead of I 2 . Previous studies 11,13 of the current dependence of S I indicated that the 1/f noise in poly-Si TFTs was due to number fluctuations. However, it was concluded that the high 1/f noise was controlled by the localized states at the grain boundaries rather than by interfacial oxide traps.…”

Section: Noise An Interface or Channel Effectmentioning

confidence: 90%

“…For example, it has been reported that the channel noise of poly-Si TFTs was much higher than that of c-MOSFETs. 12,13,16 It is expected that ␣-Si:H TFTs produce even more channel 1/f noise, in which case we may neglect the noise contribution from the series resistors. Therefore, we may write the total noise in ␣-Si:H TFTs as:…”

Section: B Noise Propertiesmentioning

confidence: 99%

“…In 1996, Fortunato 11 and Aoki et al, 12 and in 1997, Carlucio et al 13 investigated the noise of poly-Si TFTs. They concluded that when the poly-Si TFTs operate in the conducting mode, the high 1/f noise was related to the localized states in the channel of the poly-Si layer, instead of the interface states.…”

Section: Introductionmentioning

confidence: 99%

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Low-frequency noise in a thin active layer α-Si:H thin-film transistors

Chen

Deen

Rheenen

et al. 1999

Journal of Applied Physics

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Low-frequency noise of hydrogenated-amorphous-silicon ͑␣-Si:H͒ thin-film transistors ͑TFTs͒ with a thin active layer and an inverted staggered device structure operating in the conducting mode has been investigated. Pure 1/f -noise spectra were observed. The results show that the physical location of the noise in ␣-Si:H TFTs is different from that in crystalline metal-oxide-semiconductor field-effect transistors. The noise contributions from the channel and interface have been determined for the device operating in different modes. The 1/f noise of ␣-Si:H TFTs stems from the channel when the device is operated in the linear region at high gate voltages. However, the 1/f noise of ␣-Si:H TFTs generated at the interface becomes significant when the device is operated in the saturation region. The interface noise can be explained by the number fluctuation model (⌬N model͒. The channel noise can be explained by either the ⌬N model or the mobility fluctuation model ͑⌬ model͒.

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Section: Noise An Interface or Channel Effectmentioning

confidence: 90%

Section: B Noise Propertiesmentioning

confidence: 99%

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Low-frequency noise in a thin active layer α-Si:H thin-film transistors

Chen

Deen

Rheenen

et al. 1999

Journal of Applied Physics

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“…Recently, the carrier number fluctuation model with and without correlated mobility fluctuation ( nmodel) has been used to explain poly-Si TFT noise behaviors and estimate trap density. [8][9][10][11][12][13] To determine the dominant reason for the electrical degradation in LTPS TFT, this study now analyzes the LFN using the nmodel and the trap densities are extracted. To confirm the effectiveness of the LFN analysis, a quantitative analysis of the trap density at a grain boundary is performed following the methods of …”

Section: Introductionmentioning

confidence: 99%

Electrical Characteristic Analysis Using Low-Frequency Noise in Low-Temperature Polysilicon Thin Film Transistors

Ym¹,

Ks²,

Hj³

et al. 2012

j nanosci nanotechnol

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This study carried out an electrical characteristic analysis using low-frequency noise (LFN) in top gate p-type low-temperature polysilicon thin film transistors (LTPS TFTs) with different active layer thicknesses between 40 nm and 80 nm. The transfer characteristic curves show that the 40-nm device has better electrical characteristics compared with the 80-nm device. The carrier number fluctuation, with and without correlated mobility fluctuation model in both devices, has modeled well the measured noise. On the other hand, the trap density and coulomb scattering in the 40-nm device are smaller compared with the 80-nm device. To confirm the effectiveness of the LFN noise analysis, the trap densities at a grain boundary are extracted using in both devices the similar methods of Proano et al. and Levinson et al. That is, coulomb scattering, caused by the trapped charges at or near the interface, has a greater effect on the device with inferior electrical properties. Based on the LFN and the quantitative analysis of the trap density at a grain boundary, the interface traps between the active layer and the gate insulator can explain the devices' electrical degradation.

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“…[2][3][4] However, conventional self-aligned polysilicon TFTs present several undesirable effects, 7,8 induced by the presence of intense electric fields at the drain junction. 1-6 In particular, it has been shown that self-aligned polysilicon TFTs are characterized by a strong 1/f noise, 1-6 whose origin has been attributed to carrier number fluctuations.…”

mentioning

confidence: 99%