No Feedback ΔΣ ADC for High Frequency Operation Using Frequency ΔΣ Modulator

Matsubara, W.; Sakou, M.; Maezawa, K.; Mizutani, Takashi

doi:10.7567/ssdm.2005.p5-6

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2006

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“…The VCO must have high linearity and wide range of frequency modulation for fully exploiting the dual-clock MASH technique. Recently, we have proposed a novel circuit to realize such VCOs, which is based on the down-conversion of high frequency signals [7]. Furthermore, FMDSM has a significant advantage that it is easy to implement multi-bit DSM employing parallel DFFs [8].…”

Section: Figmentioning

confidence: 99%

Dual-clock MASH delta-sigma modulator employing a frequency modulated intermediate signal

Maezawa

Sakou

Matsubara

et al. 2006

IEICE Electron. Express

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A dual-clock MASH (multi-stage noise shaping) deltasigma modulator (DSM) is proposed for high performance analog-digital converter. This employs a DSM using a frequency modulated intermediate signal (FMDSM) for the last stage. The sampling clock frequency for the last stage can be increased due to the features of the FMDSM. It is shown that this can increase the SNR beyond the conventional MASH DSMs.

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Section: Figmentioning

confidence: 99%