Next-generation 10 GBaud module based on emerging SFP+ with host-based EDC [Topics in Optical Communications]

Bhoja, Sudeep; Ghiasi, Ali; Chang, Y.; Dudek, M.; Inano, S.; Tsumura, E.

doi:10.1109/mcom.2007.344584

Cited by 17 publications

(9 citation statements)

References 8 publications

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“…The motivation for this study is because of SFP+ connectors widely applied in the following areas: Fibre Channel, Gigabit Ethernet, InfiniBand of high-speed networking, Hub Switches, and Routers. One single SFP+ port can support data rate up to 10.0 Gbit/s, and one SFP+ connector contains 8 Gb fiber channel and 10 GbE (Gigabit Ethernet) [1] with PnP (Plug and Play) supporting. The 2xN SFP+ connector investigated in this study is shown in Figure 1, and each pin assignment is defined as Table 1.…”

Section: Structure Description Of Sfp Connectormentioning

confidence: 99%

Measurement analysis and improvement technique of signal integrity for high-speed connectors

Lin

Huang

Lin³

et al. 2012

2012 Asia-Pacific Symposium on Electromagnetic Compatibility

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The demanding for high speed network communications explodes in recent years for Internet applications. Although the optical fibre deployed already provides broader bandwidth for high speed applications, the transceivers are still in need to convert optical signal into electrical signal for front-end of server computer. Therefore, the high speed connectors play critical roles for interconnect between optic-electric converting transceivers and server computer. In this study, we investigate the signal integrity (SI) analysis for 10 Gbps two-layered SFP+ connector with EM simulation and measurement. Since the differential pair transmission is applied to SFP+ connector, we measure its differential mode (DM) reflection and transmission coefficients with network analyser first. We then observe the variation of DM impedance and analyse the cause of impedance discontinuity by the utilization of TDR measurement. Finally, we will propose modified connecter structure by changing pin width to improve the signal integrity.

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Section: Structure Description Of Sfp Connectormentioning

confidence: 99%

Measurement analysis and improvement technique of signal integrity for high-speed connectors

Lin

Huang

Lin³

et al. 2012

2012 Asia-Pacific Symposium on Electromagnetic Compatibility

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“…EDC using CMOS technology has been previously proposed [1] to compensate for optical channel multi-path modal, chromatic and polarization-mode dispersions. The first success of EDC commercial deployment with significant shipping volume in term of X2/SFP+ form factors [1][2] has been identified in enterprise networks to upgrade the large installed base of legacy MMFs running at 1Gb/s. Its optical interfaces were specified by 10GBASE-LRM (long-reach multimode) ratified by IEEE 802.3aq task force [3] for serial 10 GbE over worst-case legacy MMF (OM1) up to 220m.…”

Section: Gb/s Edc Uncompensated Transmissionmentioning

confidence: 99%

Status of Industry Efforts to Deploy EDC and Advanced Modulation Schemes for Extended Reach Transport Applications

Chang

2008

OFC/NFOEC 2008 - 2008 Conference on Optical Fiber Communication/National Fiber Optic Engineers Conference

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The current status of industrial efforts to standardize interoperable optical interfaces applied to transmitters and receivers is reviewed with particular emphasis on the application of EDC and advanced modulation schemes emerging from OIF/ITU-T targeted transmissions over longer dispersion uncompensated distances.The value proposition of EDC for metro and regional networks is two-fold: reach extension, and cost reduction. An example would be to take a link that is normally limited to 80 km and with EDC technology extend it to 120 km (assume worst-case dispersion of 20ps/nm/km) with minimal or no additional expense to the system user. This eliminates the use of bulky and costly optical dispersion compensation means such as DCF. Alternatively, EDC enhanced system performance margins could be leveraged in qualification testing, allowing associated operational savings. a1229_1.pdf NWC2.pdf OFC/NFOEC 2008 978-1-55752-855-1/08/$25.00 ©2008 IEEE

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“…Table 1, list module form factors for 10 GbE, 40 GbE, and 100 GbE and their bandwidth density. With introduction of the SFP+ in 2007, the front panel bandwidth bottleneck was eliminated with aggregate BW of 480 Gb/s [5]. Then in 2010 QSFP+ in creased the front panel BW to 1.44 Tb/s assuming 36 QSFP+ modules each operating at 40 Gb/s.…”

Section: Introductionmentioning

confidence: 99%

Is there a need for on-chip photonic integration for large data warehouse switches

Ghiasi

2012

The 9th International Conference on Group IV Photonics (GFP)

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Over the past 18-months VCSEL based optical engines have been integrated into package of largescale HPC routers, moderate size Ethernet switches, and even FPGA's. Competing solutions based on Silicon Photonics (SiP) are emerging and targeting similar application space but with better integration path through the use of TSV (Through Silicon Via) stack dies. Integrating either VCSEL or SiP based optical engines into complex IC package that operate at high temperatures and require high reliability is not trivial, and one should ask what is the technical or the economic advantage before embarking on such a drastic architectural change. We are currently investigating the extend to which scenarios on-chip photonic integration into large-scale data warehouse switches have clear power and/or bandwidth advantages over using traditional electrical I/O. 1.0 Introduction: The need for optical interconnect for HPC applications was clearly demonstrated in case of POWER7 server [1], where 28 VCSEL based µPOD optical engines each having 12 lanes were placed on the POWER7 Router Module. The POWER7 Router Module with each lane operating at 10 Gb/s had an aggregate BW of 2.68 Tb/s excluding 8b/10B overhead. More recently, VCSEL based optical engine integrated at wafer level have been demonstrated called "Holey Optochip" with a potential to overcome substrate size and congestion, reduce foot print, and power [2]. The 10 GbE MMF link reach based on OM3 (2000 MHz.km) fiber is 300 m, but the 100 GbE link reach based on 4x25.78 GBd signaling expected to be ~70 m on OM3 and ~100 m on OM4 (4700 MHz.km) [3]. These MMF fiber reaches are adequate to meet HPC application, but does not meet reach requirements of large data warehouses requiring at least 500m.Currently large data warehouse switches front panel bandwidth-density is being limited by the front panel pluggable module at 1.44 TB/s assuming 36 ports of QSFP+ each operating at 40 GbE. On board optics would solve the front panel bandwidth-density, but somewhere in the 3-4 Tb/s the switch ASIC package will limit bandwidth for reasonable package/PCB constructions. Unlike HPC applications, these massive data centers require a minimum fiber reach of 500 m, which is well beyond the reach of any MMF fibers at 25.78 GBd. A single mode solution based on silicon photonics (SiP) MCM or TSV has the potential to not only meet the reach objective but also the cost and power targets [4].

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Next-generation 10 GBaud module based on emerging SFP+ with host-based EDC [Topics in Optical Communications]

Cited by 17 publications

References 8 publications

Measurement analysis and improvement technique of signal integrity for high-speed connectors

Measurement analysis and improvement technique of signal integrity for high-speed connectors

Status of Industry Efforts to Deploy EDC and Advanced Modulation Schemes for Extended Reach Transport Applications

Is there a need for on-chip photonic integration for large data warehouse switches

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