New Figure-of-Merit Combining Semiconductor and Multi-Level Converter Properties

Abstract

Figures-of-merit (FOMs) are widely-used to compare power semiconductor materials and devices and to motivate research and development of new technology nodes. These material-and device-specific FOMs, however, fail to directly translate into quantifiable performance in a specific power electronics application. Here, we combine device performance with specific bridge-leg topologies to propose the extended FOM, or X-FOM, a figure-of-merit that quantifies bridge-leg performance in multi-level (ML) topologies and supports the quantitative comparison and optimization of topologies and power devices. To arrive at the proposed X-FOM, we revisit the fundamental scaling laws of the on-state resistance and output capacitance of power semiconductors to first propose a revised device-level semiconductor Figure-of-Merit (D-FOM). The D-FOM is then generalized to a multi-level topology with an arbitrary number of levels, output power, and input voltage, resulting in the X-FOM that quantitatively compares hard-switched semiconductor stage losses and filter stage requirements across different bridgeleg structures and numbers of levels, identifies the maximum achievable efficiency of the semiconductor stage, and determines the loss-optimal combination of semiconductor die area and switching frequency. To validate the new X-FOM and showcase its utility, we perform a case study on candidate bridge-leg structures for a three-phase 10 kW photovoltaic (PV) inverter, with the X-FOM showing that (a) the minimum hard-switching losses are an accurate approximation to predict the theoretically maximum achievable efficiency and relative performance between bridge-legs and (b) the 3-level bridge-leg outperforms the 2-level configuration, despite utilizing a SiC MOSFET with a lower D-FOM than in the 2-level case.

HERIC-Clamped and PN-NPC Inverters With Five-Level Output Voltage and Reduced Grid-Interfaced Filter Size

“…On the other hand, the current across the output filter inductor is a function of the applied volt-seconds across L f . Therefore, with respect to [25], the current ripples of the inductor can be drastically reduced with the relation of ∝ 1/(n − 1) 2 , where n is the number of inverter output voltage levels. Conversely, the employed PS-PWM allows the converter to double the apparent output switching frequency, f so = 2f sw as earlier discussed.…”

“…1, where, at the same condition of the input dc voltage, effective switching frequency, and filter inductor size, the conduction losses associated with the grid-interfaced filter are reduced by the enhancement of the inverter output voltage levels [25]. Herein, the type of PWM scheme, i.e., level-shifted (LS) or phase-shifted (PS) applied to the multilevel converters can also affect the apparent switching frequency of the inverter output voltage/current waveforms [25]. Hence, the modulation effect is reflected in the ripple content of the inverter output current and can thereby affect the grid-interfaced filter losses.…”

On the Role of Switch Output Capacitance on Passive Balancing within the Flying Capacitor Multilevel Converter

“…In pursuit of maximizing these objectives, the Flying Capacitor Multi-Level (FCML) converter has emerged as a promising topology for these cutting edge applications [1], [2]. Although the topology was initially developed to remedy the lack of high voltage switches rated for the input voltage in high voltage power conversion applications [3], it is able to outperform conventional topologies in lower voltage applications where even though a monolithic switch may be available, the series combination of multiple lower voltage switches is found to be higher performance [4]. A simplified schematic of a 5-level FCML converter is presented in Fig.…”

Three-Level Unidirectional Rectifiers under Non-Unity Power Factor Operation and Unbalanced Split DC-Link Loading: Analytical and Experimental Assessment

“…All the aforementioned required and desired features can be addressed either with a proper converter control strategy (1)-( 6) [14][15][16], with an accurate AC-side filter design (1) [17,18], or with an appropriate selection of the converter modulation strategy (4) [8,19]. In particular, (6) has not been explored in the literature and is increasingly becoming a desired feature of modern rectifiers, as distribution system operators (DSOs) are starting to charge end consumers for the injection/withdrawal of reactive energy into/from the grid [20]. If properly controlled, existing unidirectional rectifiers could in fact actively compensate this reactive power excess and/or substitute traditional power factor correction capacitor banks, benefiting the DSO and improving the system power quality.…”

“…Even though modern semiconductor technologies (e.g., high-voltage SiC MOSFETs) can substantially improve the two-level inverter performance by reducing losses and allowing for higher operating frequencies, multi-level converter solutions have demonstrated higher achievable performance, both in terms of efficiency and power density [3][4][5]. In fact, these topologies simultaneously reduce the stress on the AC-side filter components and allow the employment of semiconductor devices with lower voltage rating and thus better figures of merit [6].…”