New Approach to Surface Voltage Based Non-Visual Defect Inspection

Marinskiy, Dmitriy; Łagowski, J.; Wilson, Marshall; Findlay, Andrew; Almeida, Carlos; Edelman, Piotr

doi:10.1149/06001.0917ecst

Cited by 7 publications

(16 citation statements)

References 3 publications

(3 reference statements)

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“…Non-contact voltage mapping has been used in the silicon circuit industry as a quick, non-destructive method to detect defects in insulators [42,43,44,45]. While the process has been described in detail previously, a brief explanation of the process is as follows.…”

Section: Methodsmentioning

confidence: 99%

Electrical Properties of Thiol-ene-based Shape Memory Polymers Intended for Flexible Electronics

et al. 2019

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Thiol-ene/acrylate-based shape memory polymers (SMPs) with tunable mechanical and thermomechanical properties are promising substrate materials for flexible electronics applications. These UV-curable polymer compositions can easily be polymerized onto pre-fabricated electronic components and can be molded into desired geometries to provide a shape-changing behavior or a tunable softness. Alternatively, SMPs may be prepared as a flat substrate, and electronic circuitry may be built directly on top by thin film processing technologies. Whichever way the final structure is produced, the operation of electronic circuits will be influenced by the electrical and mechanical properties of the underlying (and sometimes also encapsulating) SMP substrate. Here, we present electronic properties, such as permittivity and resistivity of a typical SMP composition that has a low glass transition temperature (between 40 and 60 °C dependent on the curing process) in different thermomechanical states of polymer. We fabricated parallel plate capacitors from a previously reported SMP composition (fully softening (FS)-SMP) using two different curing processes, and then we determined the electrical properties of relative permittivity and resistivity below and above the glass transition temperature. Our data shows that the curing process influenced the electrical permittivity, but not the electrical resistivity. Corona-Kelvin metrology evaluated the quality of the surface of FS-SMP spun on the wafer. Overall, FS-SMP demonstrates resistivity appropriate for use as an insulating material.

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Section: Methodsmentioning

confidence: 99%

Electrical Properties of Thiol-ene-based Shape Memory Polymers Intended for Flexible Electronics

et al. 2019

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“…In mapping of surface voltage, the Kelvin probe measurement is performed "in-flight" with the wafer moving under the probe. 19 The number of measurement sites for full wafer maps is approximately 50,000 and the map acquisition time is about 4 minutes. For high throughput wafer inspection, a simultaneous multi-probe voltage measurement is used with in-situ matching of the probe readouts.…”

Section: Principles Of the Corona-kelvin Techniquementioning

confidence: 99%

“…For high throughput wafer inspection, a simultaneous multi-probe voltage measurement is used with in-situ matching of the probe readouts. 19 Corona charge retention and removal.-In wide-bandgap semiconductors, bare surfaces in depletion were found to have an excellent corona charge retention in defect-free areas. A large energy gap prevents thermal generation of minority carriers that could flow to the surface and neutralize corona ions responsible for creating a depletion layer (i.e.…”

Section: Principles Of the Corona-kelvin Techniquementioning

confidence: 99%

Review—Recent Advancement in Charge- and Photo-Assisted Non-Contact Electrical Characterization of SiC, GaN, and AlGaN/GaN HEMT

Wilson¹,

Findlay²,

Savtchouk³

et al. 2017

ECS J. Solid State Sci. Technol.

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The charge-based corona-Kelvin non-contact metrology, originally developed for Si IC fabrication, has recently been extended to wide energy gap semiconductors. We discuss principles of this extension and key applications, namely: high precision dopant measurement on SiC and GaN; two-dimensional electron gas characterization in AlGaN/GaN HEMT structures; interface and dielectric characterization on epi-layers with SiO 2 and SiN; comprehensive interfacial instability characterization of oxidized SiC; and whole wafer mapping of defects with a charge-assisted surface voltage technique, QUAD. This powerful set of measurements is performed without fabrication of any test structures or electrical contact. Corresponding commercial tools are currently being introduced. Based on the historical example of silicon IC, we believe that this approach shall offer enhanced testing for research and for manufacturing process control with reduced cost and fast data feedback benefiting wide-bandgap device technology. . This paper is part of the JSS Focus Issue on GaN-Based Electronics for Power, RF, and Rad-Hard Applications.Development of semiconductor devices and control of the manufacturing process requires cost effective metrology with rapid feedback to pilot or manufacturing lines. In this respect, silicon IC's have been benefiting from inventions (by IBM, Fishkill, NY 1 and by SDI, Tampa, FL 2 ) that created a foundation for the unique charge-based non-contact electrical metrology. 3In this technique, an electrical biasing is produced by corona charging of a surface and the response is monitored by measuring the surface voltage with a vibrating probe, such as a Kelvin-probe. The technique is commonly referred to as the corona-Kelvin method. 4 Corresponding commercial tools designed for Si wafers reduced the need for fabrication of electrical test devices and electric contacts; lowering the manufacturing cost and shortening the data feedback time from weeks to less than one hour. 5 The metrology has been continuously improved in sensitivity, precision, repeatability, and spatial resolution; meeting the demands of new technology nodes. It has been used by all major silicon IC manufacturing companies and has also been adopted by smaller silicon device fablines looking for cost effective metrology solutions.Very recent developments in corona-Kelvin, discussed in this work, are intended for rapidly advancing wide-bandgap semiconductor technology that includes SiC, GaN, and AlGaN/GaN heterostructures.

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“…In spite of about 4000 times smaller probing area there is practically no decrease of accuracy in our micro-Kelvin force probe measurements. 17,18 For precise defect characterization and location on the wafer, the surface voltage mapping incorporates three mapping modes, 8 i.e. the surface voltage magnitude, the gradient magnitude, and the derivative.…”

Section: Principles Of Non-contact Surface Voltage Measurementmentioning

confidence: 99%

“…Significant refinement of the technique and the improvement of map resolution and measurement speed have only recently been introduced, using multiple Kelvin probes in a novel generation of surface voltage mapping, SVM tools. 8 The corresponding most recent application examples include monitoring of defects in Si patterned wafers and high resolution intra-die mapping with microKelvin Force Probe.8 Finally, we discuss extension of the technique to epitaxial SiC layers and we compare surface voltage mapping of defects with mapping of lifetime degrading defects.9,10 The corresponding SiC results illustrate three stages of our metrology: 1-whole wafer defect mapping; 2-defect identification with high resolution Kelvin Force Microscopy mapping and 3-further defect investigation using DLTS-like surface voltage transient analysis.For certain applications the surface voltage NVD metrology uses surface charge biasing performed with corona charging. Noninvasive corona charging is realized with low charging current (in nA/cm 2 range) and a low fluence range of nC/cm 2 up to 1 μC/cm 2 .…”

mentioning

confidence: 99%

Non-Visual Defect Monitoring with Surface Voltage Mapping

Findlay¹,

Marinskiy²,

Edelman³

et al. 2015

ECS J. Solid State Sci. Technol.

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Non-Visual Defects (NVD) is a category of semiconductor material and process induced defects that cause electrical failures, but are not detected with visual wafer inspection tools. This paper gives an overview of our non-contact electrical NVD metrology that uses fast whole wafer inspection with standard mm resolution Kelvin probe surface voltage mapping. In an advanced approach detected NVDs are mapped in high resolution (μm range) using Force Kelvin Probe Microscopy. In depth NVD characterization is done with the corona-Kelvin method that quantifies dielectric and interfacial properties in the defect site. This characterization is performed in a non-invasive fluence range of corona charging and all measurements are non-contact, and do not require fabrication of test devices. Wafer inspection based on surface voltage mapping is used in silicon IC processing for detection of a broad category of defects that are revealed on the surface as localized regions with different values of surface potential. The approach has been very successful in monitoring of plasma etch damage [1][2][3] and was also applied to ion implant, 4,5 and wet etch process monitoring. 6 Localized charging of the silicon wafer by unbalanced plasma or an ion beam can lead to localized melting due to arcing. In less extreme cases, charging can cause antenna damage to the gate dielectric. It can also attract particles increasing surface contamination.The root cause of these electrical defects is the charging of the surface by a process that is not detected by optical based inspection tools. When the failure occurs it is not easy to troubleshoot the problem since at a later stage only the consequence of charging, but not the charging itself, is being detected. In addition to surface charge, there are other process related defects not revealed by optical inspection.In 2009 ISMI has defined non-visual defects (NVD) as a novel category of defects (novel in their classification) that cause electrical failures but do not leave behind a physical remnant that can be affordably detected with visual wafer inspection tools.7 Common NVDs also include surface metal contaminants (Cu, Fe); alkali metals (ions Na + ); and gate metal effective work function defects. In this overview we include historically important examples of surface voltage mapping, dating back to mid 1990's. Significant refinement of the technique and the improvement of map resolution and measurement speed have only recently been introduced, using multiple Kelvin probes in a novel generation of surface voltage mapping, SVM tools. 8 The corresponding most recent application examples include monitoring of defects in Si patterned wafers and high resolution intra-die mapping with microKelvin Force Probe.8 Finally, we discuss extension of the technique to epitaxial SiC layers and we compare surface voltage mapping of defects with mapping of lifetime degrading defects.9,10 The corresponding SiC results illustrate three stages of our metrology: 1-whole wafer defect mapping; 2-defect identification w...

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New Approach to Surface Voltage Based Non-Visual Defect Inspection

Cited by 7 publications

References 3 publications

Electrical Properties of Thiol-ene-based Shape Memory Polymers Intended for Flexible Electronics

Electrical Properties of Thiol-ene-based Shape Memory Polymers Intended for Flexible Electronics

Review—Recent Advancement in Charge- and Photo-Assisted Non-Contact Electrical Characterization of SiC, GaN, and AlGaN/GaN HEMT

Non-Visual Defect Monitoring with Surface Voltage Mapping

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