New Approach for Designing and Optimally Selecting the Parameters of Graphene nano-ribbon Transistors in the Presence of Process Variation

Abstract

GNRFET Graphene Nano-Ribbon Field-Effect Transistor is sensitive to geometric parameters. Therefore, changing parameters circuit characteristics can be improved or degraded. In this study, we propose a new approach to optimizing the GNRFETs. The effect of geometric and process parameters such as chirality, channel length, width, line edge roughness, oxide thickness, and doping on characteristics of an inverter gate is investigated based on GNRFET. Analysis of power consumption, delay, PDP, and SNM results indicate that GNRFETs adjustable parameters can significantly affect circuit performance. It is shown that SNM increases by changing channel length and width. Moreover, by reducing the channel length from 20 nm to 10 nm, delay for chirality (6,0) decreases by 50%, and delay for chirality (10,0) decreases by 53%. By increasing the Line Edge Roughness by 20%, power consumption for chirality (10,0) and chirality (6,0) increases by 18% and exponentially, respectively. Also, by decreasing the oxide thickness, SNM and power consumption are increased; however, the delay behaves differently with chiralities (6,0) and (10,0). This research demonstrates the importance of accurately determining the GNRFET adjustable parameters according to the design aims. A set of recommendations is provided for optimal parameters needed by digital circuit designers to use GNRFET in their design optimally.

A Novel technique for designing and optimizing gaps between graphene nanoribbons in GNRFETS using Extended Huckel Theory

“…Therefore, by increasing the number of GNRs to two channels, it increases the off current for both families. The minimum off-current value of the singlechannel device has been recorded as 1.74 × 10 −13 𝐴 with chirality (7,0). This current for the dual-channel device with different 𝑊 𝑠𝑝 = 2.5𝑛𝑚, 𝑊 𝑠𝑝 = 1.5 𝑛𝑚, and 𝑊 𝑠𝑝 = 0.5 𝑛𝑚 can be obtained as 2.3 × 10 −13 𝐴, 9.74 × 10 −13 𝐴, and 1.02 × 10 −10 𝐴, respectively.…”

“…The device's offand on-currents rise as the number of GNR channels increases. The on-current of the single-channel device has been recorded as 7.63 × 10 −7 𝐴 with chirality (7,0). This current for the same device of two ribbons with different 𝑊 𝑠𝑝 = 2.5𝑛𝑚, 𝑊 𝑠𝑝 = 1.5 𝑛𝑚, and 𝑊 𝑠𝑝 = 0.5 𝑛𝑚 can be obtained as 2.74 × 10 −6 𝐴, 2.51 × 10 −6 𝐴, and 2.30 × 10 −6 𝐴, respectively.…”

“…The authors demonstrated in [7] that the circuit performance of this device was very dependent on process variations, including channel width and length, oxide layer thickness, doping, and ribbon edge roughness. The simulation results indicated that the 3p family's GNRFET-based inverter gate is more vulnerable to process variations than the 3p+1 analogous circuit.…”