Neurophysics-inspired parallel architecture with resistive crosspoint array for dictionary learning

Abstract

This paper proposes a parallel architecture with resistive crosspoint array. The design of its two essential operations, Read and Write, is inspired by the biophysical behavior of a neural system, such as integrate-and-fire and timedependent synaptic plasticity. The proposed hardware consists of an array with resistive random access memory (RRAM) and CMOS peripheral circuits, which perform matrix product and dictionary update in a fully parallel fashion, at the speed that is independent of the matrix dimension. The entire system is implemented in 65nm CMOS technology with RRAM to realize high-speed unsupervised dictionary learning. As compared to state-of-the-art software approach, it achieves more than 3000X speedup, enabling real-time feature extraction on a single chip.

Parallel Architecture With Resistive Crosspoint Array for Dictionary Learning Acceleration

“…The proposed Read circuit is essentially a current-to-digital converter, where it senses the output current at each (or ) node for (or ), and converts to digital values [19]. In principle, this output response is similar to that of a biological neuron model, namely Integrate-and-Fire (IF) [20], [21].…”