NeuPow

Nasser, Yehya; Sau, Carlo; Prévotet, Jean-Christophe; Fanni, Tiziana; Palumbo, Francesca; Hélard, Maryline; Raffo, Luigi

doi:10.1145/3310273.3322820

Cited by 4 publications

(6 citation statements)

References 9 publications

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“…To the best of our knowledge, our previous works were the first proposing a power estimation methodology that allows designers to explore various hardware solutions in terms of power consumption and performance [26,27]. The proposed estimation methodology and power models, based on ANNs, were exploited to predict the power consumed by digital components implemented on FPGA or on ASIC platforms.…”

Section: Related Workmentioning

confidence: 99%

“…The proposed estimation methodology and power models, based on ANNs, were exploited to predict the power consumed by digital components implemented on FPGA or on ASIC platforms. In this paper we improve our previous positioning work [27] on ASIC by proposing more efficient models, by addressing all the aforementioned limitations.…”

Section: Related Workmentioning

confidence: 99%

“…Indeed, glitchy signals generated by a component are responsible for a significant amount of power consumption in the following components. We evaluated the difference between results obtained in our previous glitch free work [27] and the proposed glitchy methodology.…”

Section: 12mentioning

confidence: 99%

“…In a previous positioning work [27], we presented the basis of NeuPow that consists of characterizing a set of elementary components before evaluating the global power consumption of a full design. ANNs have been used to model power and behaviour of simple operators implemented in ASICs.…”

Section: Introductionmentioning

confidence: 99%

“…Building upon such preliminary study, in this work, we improve different elements of the methodology and provide a wider assessment. Below, the main contributions with respect to our previous positioning work [27] are summarized:…”

Section: Introductionmentioning

confidence: 99%

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NeuPow

Nasser

Prévotet

et al. 2020

ACM Trans. Des. Autom. Electron. Syst.

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In this paper, we present a new, simple, accurate and fast power estimation technique that can be used to explore the power consumption of digital system designs at an early design stage. We exploit the machine learning techniques to aid the designers in exploring the design space of possible architectural solutions, and more specifically, their dynamic power consumption, which is application, technology, frequency and data stimuli dependent. To model the power and the behavior of digital components, we adopt the Artificial Neural Networks (ANNs), while the final target technology is Application Specific Integrated Circuit (ASIC). The main characteristic of the proposed method, called NeuPow, is that it relies on propagating the signals throughout connected ANN models to predict the power consumption of a composite system. Besides a baseline version of the NeuPow methodology that works for a given predefined operating frequency, we also derive an upgraded version that is frequency aware, where the same operating frequency is taken as additional input by the ANN models. To prove the effectiveness of the proposed methodology, we perform different assessments at different levels. Moreover, technology and scalability studies have been conducted, proving the NeuPow robustness in terms of these design parameters. Results show a very good estimation accuracy with less than 9% of relative error independently from the technology and the size/layers of the design. NeuPow is also delivering a speed-up factor of about 84× with respect to the classical power estimation flow.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: 12mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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NeuPow

Nasser

Prévotet

et al. 2020

ACM Trans. Des. Autom. Electron. Syst.

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High-level power estimation techniques in embedded systems hardware: an overview

et al. 2022

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Power optimization has become a major concern for most digital hardware designers, particularly in early design phases and especially in limited power budget systems (battery-operated hand-held devices, electro-optical pluggable modules, IoT and green energy systems, etc.). Subsequently, early power consumption estimation at design time is crucial for power optimization. The aim of this paper is to present an overview of High-Level power estimation techniques currently available along with a comprehensive comparison between different methodologies and their applications on estimated models. When high speed and high performance are key features of a specific embedded system, increase in energy consumption becomes the main hurdle to be tackled while keeping speed/performance v/s power consumption trade-off at a minimum. This paper provides designers, interested in power consumption modeling, with knowledge on how to select best power estimation techniques applied to designated target models.

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