Network-on-Chip Xilinx Implementation of WBCDMA System and Its AWGN Performance Analysis

Devi, S. Rama; Vedavyas, T.; Anuradha, M. Satya

doi:10.1007/978-981-15-3828-5_26

Cited by 1 publication

(1 citation statement)

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“…Recently, many NoC architectures have been inspired by our previous works of the overloaded and aggregated CDMA crossbars presented in [1], [9], [10]. An experimental study on the effect of noise on CDMA crossbars is presented in [19]. An 8-node WB-CDMA crossbar was developed and synthesized in a Xilinx FPGA.…”

Section: Related Workmentioning

confidence: 99%

Aggregated CDMA Crossbar With Hybrid ARQ for NoCs

Farag

Ahmed

2022

IEEE Access

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Network-on-Chips (NoCs) are the dominant interconnection technique in modern Systemon-Chips (SoCs). NoC routers constitute the physical layer of on-chip interconnects while the medium access technique utilized in NoC routers profoundly impacts the performance and footprint of the router. Code Division Multiple Access (CDMA) is one of the prominent access techniques employed in the physical layer crossbar of NoC routers. Adopted from the wireless communications realm, the CDMA-based crossbar relies on spreading the transmitted data bit on the physical channel using orthogonal codes, summing the data spread from various transmitters, then decoding the received sum using correlation decoders to extract the sent binary bit. However, due to multiple access interference and random channel effects notorious in wireless communications and following the same exact approach in on-chip CDMA interconnects, existing CDMA crossbars are bit-wise architectures where binary data bits are spread and serially communicated on an exclusive digital channel while replicating this configuration to communicate multi-bit packets which increases the crossbar area overhead. We advance an elegant modification to improve the area and power consumption of the classical CDMA crossbars. Aggregated CDMA (ACDMA) relies on high wiring density in modern SoCs in addition to its static nature and relative noise immunity to improve the classical CDMA crossbar architecture by aggregating the transmission of multiple data bits on the same channel which reduces the overhead of ordinary CDMA-based NoCs. In this work, the ACDMA mathematical foundations, crossbar hardware architecture, and full NoC realizations are presented. The implementation results on the 65 nm standardcell ASIC technology show a significant improvement in the resource utilization and power consumption of the ACDMA crossbar and ACDMA-based NoCs compared to the ordinary CDMA and CONNECT NoC counterparts. Moreover, the ACDMA interconnect reliability in AWGN channels is studied and improved using a hybrid ARQ approach tailored to the ACDMA crossbar.

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Section: Related Workmentioning

confidence: 99%