Near Real-Time 3D Reconstruction from InIm Video Stream

Abstract

Abstract. An efficient hardware architecture for the acceleration of an integrated 3D reconstruction method is presented, targeting demanding dynamic Integral Imaging applications. It exploits parallel processing and features minimized memory operations by implementing an extended-access memory scheme. Its reduced data throughput, thanks to optimized data utilization, makes it suitable for single FPGA device implementation. Results reveal that the hardware system outperforms the software method by an order of magnitude. Moreover, its processing rate surpasses the typical rate of a dynamic Integral Imaging acquisition system, thus making a significant step towards real-time 3D video reconstruction.

A real-time FPGA architecture for 3D reconstruction from integral images

“…Compared with the single-neighbor approach [17], this scheme requires extra circuitry that allows the array of 50 SAD Units to operate as two sub-modules of variable size each. The central EI's block arrives at the input of each sub-module, and the neighboring blocks are also distributed to the correct SAD Units.…”

Real-time processing pipeline for 3D imaging applications

“…As a result, the number of SAD Units for such an implementation is defined by the maximum sum of comparison blocks in opposite neighboring EIs, which is determined to be 50 for the specific practical system. Compared with a single-neighbor approach [16], this scheme requires extra circuitry that allows the array of 50 SAD Units to operate as two sub-modules of variable size each. The central EI's block arrives at the input of each submodule, and the neighboring blocks are distributed to the correct SAD Units.…”

“…Additionally, a method that is focused on the reconstruction of a fully 3D surface model is recently proposed in [10], which demonstrates several advantages compared to previous attempts on the field [11][12][13][14][15] in terms of scene size and reconstruction quality. An attempt to accelerate this technique using a digital architecture is presented in [16]. Both hardware implementations target on efficiently implementing a comparison metric that is used to determine best matches between pixels of neighboring EIs, either for disparity estimation or for grid computations.…”

Computational Technique of 3D Reconstruction in Integral Imaging using FPGA Hardware

“…IP uses a micro lens array (MLA) over a high resolution Charge Couple Detector (CCD) to pick up and record a group of 2D elemental images of 3D object. These recorded images have their own perspective and de-magnified images of a 3D object ( [4], [5]). The operational principle of Integral imaging system is shown in Fig.1.…”

“…Several attempts for 3D object reconstruction and visualization using InIms have been reported in the literature ([10]- [13]). Relying on hardware implementation of digital architecture, several attempts are carried out for 3D scene reconstruction using InIms and accelerating the reconstruction process ( [5], [13]). In this paper, a simple computer-based 3D image reconstruction using a powerful hardware based on FPGA device is proposed.…”