Directed-assembly of nanowire-based devices 1 will enable the development of integrated circuits with new functions that extend well beyond mainstream digital logic. For example, nanoelectromechanical resonators are very attractive for chip-based sensor arrays 2 because of their potential for ultrasensitive mass detection 3-6 . In this letter, we introduce a new bottom-up assembly method to fabricate large-area nanoelectromechanical arrays each having over 2,000 single-nanowire resonators. The nanowires are synthesized and chemically functionalized before they are integrated onto a silicon chip at predetermined locations. Peptide nucleic acid probe molecules attached to the nanowires before assembly maintain their binding selectivity and recognize complementary oligonucleotide targets once the resonator array is assembled. The two types of cantilevered resonators we integrated here using silicon and rhodium nanowires had Q-factors of ~4,500 and 1,150, respectively, in vacuum. Taken together, these results show that bottom-up nanowire assembly can offer a practical alternative to top-down fabrication for sensitive chip-based detection.Our hybrid nanoelectromechanical systems (NEMS) array integration strategy combines deterministic bottom-up nanowire (NW) assembly with conventional top-down microfabrication as illustrated in Fig. 1. Here we show the flexibility of this approach by fabricating resonators using two types of NWs-semiconducting silicon (Si) or metallic rhodium (Rh)-synthesized off-chip with different growth methods. The SiNWs grown by the Au-catalysed vapour-liquid-solid (VLS) technique are predominately single-crystal and oriented in the 〈111〉 or 〈112〉 growth directions 7 . In contrast, RhNWs electrodeposited within the pores of anodic aluminium oxide membranes are polycrystalline, with an average grain size of 5 nm (ref. 8). This assembly method is quite general and can be extended to many other NW materials 1,9 (for example, multisegment metal, magnetic, oxide or piezoelectric materials) and geometries 10 (for example, hollow tube or flat belt).Correspondence and requests for materials should be addressed to R.B.B. and T.S.M. † These authors contributed equally to this work. Bottom-up assembly is used to position single NWs at lithographically defined locations on a Si chip for fabricating multiplexed arrays. Unlike earlier reports of NW assembly 11-15 , three separate mechanisms are combined to achieve high-yield NW integration over centimetre-scale chip areas: electric-field forces, capillary forces and NW lift-off. As illustrated in Fig. 1, we patterned arrays of wells in a sacrificial insulating photoresist layer covering metal guiding electrodes defined on the chip surface. An alternating voltage in the kilohertz range was applied between the guiding electrodes to produce spatially confined electric fields that polarize NWs in suspension 11 . Long-range dielectrophoretic forces attract the NWs to the surface and align them along the electric-field gradient. Single NWs are further centr...