Nanometer range: A new theoretical challenge for microelectronics and optoelectronics

2009

Purpose-This paper attempts to review recent advances in wire bonding using copper wire. Design/methodology/approach-Dozens of journal and conference articles published recently are reviewed. Findings-The problems/challenges such as wire open and short tail defects, poor bondability for stitch/wedge bonds, oxidation of Cu wire, strainhardening effects, and stiff wire on weak support structures are briefly analysed. The solutions to the problems and recent findings/developments in wire bonding using copper wire are discussed. Research limitations/implications-Because of page limitation of the paper, only a brief review is conducted. Further reading is needed for more details. Originality/value-This paper attempts to provide introduction to recent developments and the trends in wire bonding using copper wire. With the references provided, readers may explore more deeply by reading the original articles.

Section: Introductionmentioning

confidence: 99%

Wire bonding using copper wire

2009

“…Integrated circuit (IC) technologies are resulting in the required advances through size reductions following Moore's law (Jackson et al, 2005), and this leads to an industrial competition of shrinking lithography (Ronse et al, 2004;Blaikie et al, 2006;Eloy and Depeyrot, 2006;Henry et al, 2006;Zell, 2006). Recently, Moore's law appears to slow down, and the capacity-doubling period has become three years towards five, with the passing of the lithographic threshold of 10 nm being postponed to 2015 (Eloy and Depeyrot, 2006). Precision manufacturing of silicon and various substrates also face more new challenges (Shankar and Zhong, 2006;Young et al, 2006;Paehler et al, 2007;Schoenfelder et al, 2007).…”

Section: Introductionmentioning

confidence: 99%

Wire bonding using insulated wire and new challenges in wire bonding

2008

Purpose -This paper attempts to review recent advances in wire bonding using insulated wire and new challenges in wire bonding for advanced microelectronics packaging. Design/methodology/approach -Dozens of journal articles, conference articles and patents published or issued in 2004-2007 are reviewed. Findings -The advantages and problems/challenges related to wire bonding using insulated wire are briefly analysed, and several solutions to the problems and recent findings/developments related to wire bonding using insulated wire are discussed. Research limitations/implications -Because of page limitation of the paper, only brief review is conducted. Further reading is needed for more details. Originality/value -This paper attempts to provide introduction to recent developments and the trends in wire bonding using insulated wire. With the references provided, readers may explore more deeply by reading the original articles and patent documents.

“…Advances of integrated circuit (IC) technologies demand shrinking lithography (Blaikie et al , 2006; Eloy and Depeyrot, 2006; Henry et al , 2006; Zell, 2006). Nano‐imprinting is a potential patterning technology (Trybula, 2006).…”

Section: Introductionmentioning

confidence: 99%

Wire bonding of low‐k devices

2008

If you would like to write for this, or any other Emerald publication, then please use our Emerald for Authors service information about how to choose which publication to write for and submission guidelines are available for all. Please visit www.emeraldinsight.com/authors for more information. About Emerald www.emeraldinsight.comEmerald is a global publisher linking research and practice to the benefit of society. The company manages a portfolio of more than 290 journals and over 2,350 books and book series volumes, as well as providing an extensive range of online products and additional customer resources and services.Emerald is both COUNTER 4 and TRANSFER compliant. The organization is a partner of the Committee on Publication Ethics (COPE) and also works with Portico and the LOCKSS initiative for digital archive preservation. AbstractPurpose -The purpose of this paper is to review recent advances in wire bonding of low-k devices. Design/methodology/approach -Dozens of journal and conference articles published in 2005-2008 are reviewed. Findings -The paper finds that many articles have discussed and analysed problems/challenges such as bond pad metal peeling/lift, non-sticking on pad, decreased bonding strength and lower wire-bond assembly yield. The paper discusses the articles' solutions to the problems and recent findings/ developments in wire bonding of low-k devices.Research limitations/implications -Because of the page limitation, only brief discussions are given in this paper. Further reading is needed for more details.Originality/value -The paper attempts to provide an introduction to recent developments and the trends in wire bonding of low-k devices. With the references provided, readers may explore more deeply by reading the original articles.