Nanolasers grown on silicon-based MOSFETs

Abstract

We report novel indium gallium arsenide (InGaAs) nanopillar lasers that are monolithically grown on (100)-silicon-based functional metal-oxide-semiconductor field effect transistors (MOSFETs) at low temperature (410 °C). The MOSFETs maintain their performance after the nanopillar growth, providing a direct demonstration of complementary metal-oxide-semiconudctor (CMOS) compatibility. Room-temperature operation of optically pumped lasers is also achieved. To our knowledge, this is the first time that monolithically integrated lasers and transistors have been shown to work on the same silicon chip, serving as a proof-of-concept that such integration can be extended to more complicated CMOS integrated circuits.

Lasing from individual GaAs-AlGaAs core-shell nanowires up to room temperature

“…Although one can expect further improvements of the NW-laser performance by improving the end-facet reflectivity via chemical polishing or by placing them onto patterned substrates for which distributed feedback concepts can be exploited 36 , the direct integration of III/V NW lasers onto silicon substrates for integrated photonics and optical interconnects 37 remains a significant challenge. Vertical emission has been recently observed from InGaAsGaAs nanopillars grown on silicon 14 and silicon metal oxide semiconductor field-effect transistors 15 by exploiting low-loss helically propagating modes for which the reflectivity of the NW substrate is high, despite the low index contrast. Furthermore, AlGaAs-GaAs NW lasers could be directly integrated into silicon and III/V photonic crystal nanostructures to facilitate highly directed vertical emission 38 or transferred onto photonic waveguides for use as integrated sources 39 .…”

“…To date, lasing from NWs has been demonstrated using a range of different material systems that span the ultraviolet and visible regions of the spectrum. This includes ZnO 10 , group-III nitrides 11 , II/VI materials 12 and, most recently, III/V NWs [13][14][15][16][17] . Very recently, infrared lasing has been observed at low temperature using InGaAs nanoneedles grown epitaxially directly on silicon 14 and silicon metal oxide semiconductor field-effect transistors 15 by exploiting whispering gallery-like optical modes.…”

“…This includes ZnO 10 , group-III nitrides 11 , II/VI materials 12 and, most recently, III/V NWs [13][14][15][16][17] . Very recently, infrared lasing has been observed at low temperature using InGaAs nanoneedles grown epitaxially directly on silicon 14 and silicon metal oxide semiconductor field-effect transistors 15 by exploiting whispering gallery-like optical modes. Furthermore, first indications of amplified spontaneous emission and lasing have been reported from optically pumped GaSb 16 and GaAsGaAsP core-shell NWs 17 .…”

Scalable ZnO nanotube arrays grown on CVD-graphene films

“…Consequently, by inserting an intermediate graphene layer, high-quality crystal can be grown on the amorphous oxide or polycrystalline-metal at top surfaces of Si-electronics, which hinder elaborate growth of semiconductor nanostructures. 7 In summary, we have demonstrated the growth of individually position-controlled and vertically aligned ZnO nanotubes on arbitrary wafer-scale substrates using catalyst-free MOVPE with a CVDgraphene film as an intermediate layer. The ZnO nanostructures had a precisely controlled shapes and highly crystalline structures as examined by SEM and TEM.…”

“…While this can be achieved with a number of specific materials on single-crystalline substrates such as sapphire and silicon wafers, [3][4][5] expanding this to more general material/substrate combinations remains challenging due to limitations in growth compatibility. For example, a direct growth on amorphous oxides or metals can often benefit nanoelectronic or optoelectronic applications, [6][7][8] but is difficult to achieve in a well-controlled manner. [9][10][11] Recently, the growth of 1D nanostructures on two-dimensional (2D) nanomaterials such as graphene has been studied as a method to allow the preparation of vertically aligned 1D nanostructures on traditionally incompatible substrates.…”