Nanoelectromechanical Control of Spin–Photon Interfaces in a Hybrid Quantum System on Chip

Clark, Genevieve; Raniwala, Hamza; Koppa, Matthew; Chen, Kevin; Leenheer, Andrew; Zimmermann, Matthew; Dong, Mark; Li, Linsen; Wen, Y. Henry; Dominguez, Daniel; Trusheim, Matthew; Gilbert, Gerald; Eichenfield, Matt; Englund, Dirk

doi:10.1021/acs.nanolett.3c04301

Cited by 3 publications

(1 citation statement)

References 43 publications

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“…Initially, ICs were simple and consisted of a transistor and capacitor with three resistors. However, advancements in fabrication technology have allowed for the creation of ICs with numerous transistors, known as System on Chip (SoC) [1]. The SoC represents the pinnacle of this progress by integrating not only transistors, but also complete functional systems, inclusive of memory, Input/ output (I/O) systems, processors and periodically the network interfaces into a chip.…”

Section: Introductionmentioning

confidence: 99%

Harnessing AI for Advanced Cybersecurity in System on Chip Design a Compendious Study

Das

2023

J Arti Inte & Cloud Comp

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System-on-Chip (SoC) designs are becoming increasingly intricate as they integrate various components and functionalities onto a single chip. This intricacy brings forth new vulnerabilities and attack surfaces, presenting a challenging task to ensure robust cybersecurity. Although previous studies have explored different AI approaches, there is a need to delve into the complexities of modern SoCs and propose practical methods to secure these systems, thereby aiding researchers in mitigating potential threats. The primary objective of this paper is to uncover the opportunities that emerge from utilizing AI techniques in SoC designs to fortify cybersecurity defenses. Subsequently, the study aims to deliberate on the complexities involved in integrating AI with SoC and provide appropriate recommendations to address these intricacies. This review paper will identify and discuss the technical, architectural, and implementation challenges faced by researchers and practitioners when incorporating AI into SoC designs for cybersecurity purposes. Moreover, it will suggest with potential solutions and strategies to effectively tackle these challenges. Furthermore, it aims to aid future researchers by offering potential research directions to enhance security in AI-SoC through innovative solutions. By identifying gaps in current literature and highlighting areas that require further exploration, this paper will guide future researchers in developing advanced and secure AI-SoC systems for cybersecurity applications. Overall, this review paper will contribute to the existing body of knowledge by providing a comprehensive analysis of the impact that integrating AI and SoC has on cybersecurity and foster advancements in AI-SoC systems that effectively enhance cybersecurity measures.

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Section: Introductionmentioning

confidence: 99%

Harnessing AI for Advanced Cybersecurity in System on Chip Design a Compendious Study

Das

2023

J Arti Inte & Cloud Comp

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Heterogeneous integration of spin–photon interfaces with a CMOS platform

Li,

Santis,

Harris

et al. 2024

Nature

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A scalable cavity-based spin–photon interface in a photonic integrated circuit

Chen,

Christen,

Raniwala

et al. 2024

Optica Quantum

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A central challenge in quantum networking is transferring quantum states between different physical modalities, such as between flying photonic qubits and stationary quantum memories. One implementation entails using spin–photon interfaces that combine solid-state spin qubits, such as color centers in diamond, with photonic nanostructures. However, while high-fidelity spin–photon interactions have been demonstrated on isolated devices, building practical quantum repeaters requires scaling to large numbers of interfaces yet to be realized. Here, we demonstrate integration of nanophotonic cavities containing tin-vacancy (SnV) centers in a photonic integrated circuit (PIC). Out of a six-channel quantum microchiplet (QMC), we find four coupled SnV-cavity devices with an average Purcell factor of ∼7. Based on system analyses and numerical simulations, we find with near-term improvements this multiplexed architecture can enable high-fidelity quantum state transfer, paving the way toward building large-scale quantum repeaters.

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Nanoelectromechanical Control of Spin–Photon Interfaces in a Hybrid Quantum System on Chip

Cited by 3 publications

References 43 publications

Harnessing AI for Advanced Cybersecurity in System on Chip Design a Compendious Study

Harnessing AI for Advanced Cybersecurity in System on Chip Design a Compendious Study

Heterogeneous integration of spin–photon interfaces with a CMOS platform

A scalable cavity-based spin–photon interface in a photonic integrated circuit

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