Multiscroll oscillator based on floating gate CMOS inverter

Abstract

The design of a multiscroll chaotic oscillator based on the realization of a sawtooth function by using floating gate MOSFETs (FGMOS), is introduced. Basically, we propose the implementation of a FGMOS inverter to generate the nonlinear functions which are responsible of the equilibrium points of a continuous chaotic dynamical system, allowing the generation of multiple scroll attractors.Spice simulations show the behavior of the nonlinear cell, along with the generation of multiscroll chaotic attractors.

Multiscroll floating gate–based integrated chaotic oscillator

“…Our proposed voltage-to-current cell based on the FGMOS inverter can be very useful to implement many forms of multiscroll systems already published. In this section, we have chosen a recent sawtooth-based multiscroll design [16] to exemplify an application. Two main reasons motivate this selection:…”

“…For instance, multiscroll chaotic oscillators can be designed using piecewise linear (PWL) functions that allow flexible schemes for the circuit implementation (e.g. [12][13][14][15][16]).…”

“…A key point in all the design techniques mentioned is that the PWL function was designed using external reference DC voltage sources or external adjustable voltage dividers. Thus, to overcome the issues of integrated circuit realization of the PWL function and DC references over a highly flexible switching element required for the generation of multiscroll attractors, we recently proposed a new nonlinear voltage-to-current cell based on FGMOS inverters [16]. Basically, the inverter is designed with an internal input offset provided by the size relationships of the gate capacitors.…”

“…Traditionally, the design strategies of multiscroll chaotic attractors are based on the use of PWL functions to design the nonlinear part of the dynamical system [1,23]. Commonly used nonlinear functions are the stair function approach [12], the saturated approach [13,24], the sawtooth function [14][15][16], and others. Most of these designs use a switching component (sign function).…”

Design of Low-Voltage, Low-Power FGMOS Based Voltage Buffer, Analog Inverter and Winner-Take-All Analog Signal Processing Circuits

“…Implementation of FGMOS inverter to generate the nonlinear functions has been proposed by Trejo-Guerra, R. et al [12]. Performance related properties such as power, delay, power-delay product (PDP), and energy-delay product (EDP) of FGMOS inverter operating in subthreshold region are investigated in [13].…”