“…However, the Y-junction duplexer tree has inherently high loss [6], and integration on the native substrate precludes incorporating multiple gain materials on the same chip. One example of an integrated approach used an array of QCLs on InP coupled to an arrayed waveguide grating (AWG) on silicon germanium (SiGe) [7,11,12], though separate chips were necessary [13]. An attractive alternative is to integrate QCLs on silicon (Si), which will allow the existing low-loss and large-scale fabrication infrastructure to be leveraged in the design of complex photonic integrated circuits (PICs) [14,15].…”