Multiple-Symbol Parallel CAVLC Decoder for H.264/AVC

Wen, Ya-Nan; Wu, Guanlin; Chen, Sao-Jie; Hu, Yu-Hen

doi:10.1109/apccas.2006.342387

Cited by 27 publications

(12 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Verilog HDL is used for hardware coding and synthesized for an FPGA (Xilinx Virtex II XC2V4000BF957). The proposed method is using only about 57% of Wen 3 for CLB count, about 5.79 times faster for the critical delay. Total decoding time gain of the proposed method is about 3.89 times faster for decoding the Foreman video sequence.…”

Section: Discussionmentioning

confidence: 99%

“…The critical path delay of the proposed design is about 5.8 times smaller than Wen. 3 The number of required configurable logic block (CLB) in Wen 3 is 654, but we use only 374. The total execution time is equal to the maximum period multiplied by the required decoding cycles.…”

Section: Comparison Of the Implementation With Wenmentioning

confidence: 99%

“…[3][4][5][6][7][8][9][10] Key to these methods is noting the bottleneck that inhibits decoding speed. The authors propose to increase the speed of run_before decoding since in many cases there are multiple run_befores for one 4 × 4 block.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Fast multiplerun_beforedecoding method for efficient implementation of an H.264/advanced video coding context-adaptive variable length coding decoder

Kim

2013

Opt. Eng

View full text Add to dashboard Cite

Abstract. We propose a fast new multiple run_before decoding method in context-adaptive variable length coding (CAVLC). The transform coefficients are coded using CAVLC, in which the run_before symbols are generated for a 4 × 4 block input. To speed up the CAVLC decoding, the run_before symbols need to be decoded in parallel. We implemented a new CAVLC table for simultaneous decoding of up to three run_befores. The simulation results show a Total Speed-up Factor of 205% ∼ 144% over various resolutions and quantization steps. © The Authors. Published by SPIE under a Creative Commons Attribution 3.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.

show abstract

Section: Discussionmentioning

confidence: 99%

Section: Comparison Of the Implementation With Wenmentioning

confidence: 99%

See 1 more Smart Citation

Fast multiplerun_beforedecoding method for efficient implementation of an H.264/advanced video coding context-adaptive variable length coding decoder

Kim

2013

Opt. Eng

View full text Add to dashboard Cite

show abstract

“…The other is developing dedicated hardware to achieve real-time performance. Reference [3][4][5] falls into the former and [6] and [6] falls in the latter.…”

Section: Introductionmentioning

confidence: 99%

“…And, they also converted input stream into meta-format to have forward-oriented and self-contained format making the processing of meta-stream independent of the original stream. On the other hand, in [6], hardware architecture for variable-length decoder of H.264/AVC by analysis of inherent parallelism of CAVLC algorithm. Especially, authors adopted Bitposition VLC decoding approach to decode Multiple symbols concurrently in a critical step in CAVLC.…”

Section: Introductionmentioning

confidence: 99%