Multiphase voltage regulator with small output ripple in both CCM and DCM

Abstract

A novel multiphase voltage regulator with small output ripple in both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) is proposed. Mathematical analysis proves that the multiphase regulator has the smallest output ripple if phases are equally interleaved. The proposed regulator could minimise the output ripple through precisely interleaved phases by using a PLL-based synchronous clock in CCM and a self-adjusted staggered-time generator in DCM. The design is validated by fabrication in 0.18 µm CMOS process. Test results show that the peak-peak values of output ripple are 6 and 9 mV with 4 and 0.3 A loads, respectively.