This paper presents the particularization of a recent multilevel multiphase space vector pulse-width modulation algorithm for three-phase converters. This modulation technique takes advantage of the switching state redundancy, which permits to achieve different goals like extending the modulation index range and reducing the number of switchings. The particularized algorithm is then compared with an existing multilevel space vector modulation technique showing many similarities. Finally, the algorithm is implemented in a low cost FPGA and it is tested in laboratory with a real prototype by using a neutral point clamped inverter.
I. INTRODUCTIONThe space vector pulse-width modulation (SVPWM) is a very common modulation technique that is still in focus of the research community attention [1]-[5] because it offers a great flexibility to optimize the switching waveforms. This technique represents the reference voltage and the switching states of the converter in a vectorial space. In this space, the reference vector is approximated by means of a sequence of switching vectors. Complexity and computational cost of traditional multilevel SVPWM techniques increase with the number of levels of the converter, and most of them use trigonometric functions or precomputed tables [6], [7]. In the two-dimensional (2D) and the three-dimensional (3D) SVPWM algorithms proposed in [8] and [9], respectively, the calculation of the switching vectors and the switching times is reduced to a few comparison and addition operations, which do not depend on the number of levels. Consequently, those multilevel techniques are very suitable for real-time implementation [10]. Recently, in [11] and [12], two new multiphase SVPWM techniques with low computational complexity, which makes them suitable for on-line implementation using low-cost devices, were presented. Both techniques can be used with the typical multilevel topologies such as diode-clamped, flying capacitor, cascaded full-bridge or even hybrid converters. The modulation technique of [11] is suitable for converters with neutral wire. In the case of converters with floating neutral, this algorithm shows a poor performance because it does not take into account the switching state redundancy. The