Multilevel Fully Logic-Compatible Latch Array for Computing-in-Memory

Yeh, Ming-Shyue; Wang, Ya-Ching; Huang, Yao-Hung; Shih, J.R.; Chih, Yu-Der; Chang, Jonathan; Lin, Chao-An; King, Ya‐Chin

doi:10.1109/ted.2023.3246946

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2024

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“…[14] For this kind of integrated circuit which needs both analog and digital memory functions, the synthesis of digitalanalog hybrid RRAM will reduce the integration complexity. [15] In contrast, the preparation of digital-analog hybrid RRAM can cope with different scenarios. [16] In previous studies, people tried to change the structure of RRAM to make RRAM have different RS behavior.…”

Section: Introductionmentioning

confidence: 99%

SiN_x‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

Zhu,

Gao,

Duan

et al. 2024

Physica Status Solidi (a)

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Herein, a digital–analog hybrid resistive random‐access memory (RRAM) is prepared by integrating the structurally similar SiNx‐based digital‐type RRAM with analog‐type RRAM by heterogeneous integration method. The Pt/SiNx/Ta/Ru is a digital RRAM due to the formation and breakage of the internal silicon dangling bonds conductive filaments, and the TiN/SiNx/Ta/Ru structure is an analog RRAM due to the traps‐filled limit region of the space‐charge limited current. The heterogeneously integrated digital RRAM has good cycling stability and endurance characteristics, and the heterogeneously integrated analog RRAM has high linearity and multistate counting characteristics. This heterogeneous integration approach is useful for the implementation of hybrid digital–analog RRAM.

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Section: Introductionmentioning

confidence: 99%

SiN_x‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

Zhu,

Gao,

Duan

et al. 2024

Physica Status Solidi (a)

View full text Add to dashboard Cite

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Multilevel Fully Logic-Compatible Latch Array for Computing-in-Memory

Cited by 1 publication

References 21 publications

SiN_x‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

SiN_x‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

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Multilevel Fully Logic-Compatible Latch Array for Computing-in-Memory

Cited by 1 publication

References 21 publications

SiNx‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

SiNx‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

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SiN_x‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration

SiN_x‐Based Digital–Analog Hybrid Resistive Random Access Memory via Heterogeneous Integration