Multichannel High-Speed Data Caching System on FPGA for RAID Storage

Wang, Haixin; Bai, Xue; Wu, Qiongzhi

doi:10.1007/978-981-13-6508-9_58

Lecture Notes in Electrical Engineering

2019

DOI: 10.1007/978-981-13-6508-9_58

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Multichannel High-Speed Data Caching System on FPGA for RAID Storage

Haixin Wang

Xue Bai

Qiongzhi Wu

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“…Xilinx's Vivado Design Suite environment is used for development testing. Programmable logic is used to build interface devices on the PL side[9]. The internal Zynq SoC builds are shown in Figure6, including ARM_APU, UART_RS422 devices, GPIO devices, ARINC429 devices and 1553B device.…”

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confidence: 99%

Design and Realization of an Aviation Computer Micro System Based on SiP

Zhang

Wei

et al. 2020

Electronics

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In recent years, microelectronics technology has entered the era of nanoelectronics/integrated microsystems. System in Package (SiP) and System on Chip (SoC) are two important technical approaches for microsystems. The development of micro-system technology has made it possible to miniaturize airborne and missile-borne electronic equipment. This paper introduces the design and implementation of an aerospace miniaturized computer system. The SiP chip uses Xilinx Zynq® SoC (2ARM® + FPGA), FLASH memory and DDR3 memory as the main components, and integrates with SiP high-density system packaging technology. The chip has the advantages of small size and ultra-low power consumption compared with the traditional PCB circuit design. A pure software-based DDR3 signal eye diagram test method is used to verify the improvement inf the signal integrity of the chip without the need for probe measurement. The method of increasing the thermal conductive silver glue was used to improve the thermal performance after the test and analysis. The SiP chip was tested and analyzed with other mainstream aviation computers using a heading measurement of extended Kalman filter (EKF) algorithm. The paper has certain reference value and research significance in the miniaturization of the aviation computer system, the heat dissipation technology of SiP chip and the test method of signal integrity.

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confidence: 99%

Design and Realization of an Aviation Computer Micro System Based on SiP

Zhang

Wei

et al. 2020

Electronics

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A-Cache: Asymmetric Buffer Cache for RAID-10 Systems Under a Single-Disk Failure to Significantly Boost Availability

Zhou

Jiang

Cao

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Multichannel High-Speed Data Caching System on FPGA for RAID Storage

Cited by 2 publications

References 2 publications

Design and Realization of an Aviation Computer Micro System Based on SiP

Design and Realization of an Aviation Computer Micro System Based on SiP

A-Cache: Asymmetric Buffer Cache for RAID-10 Systems Under a Single-Disk Failure to Significantly Boost Availability

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