“…Ferroelectric FETs (FEFETs), in which the ferroelectric material is integrated within the gate stack of a transistor (Yu et al, 2021), offer appealing attributes that mitigate the concerns of FERAMs. For instance, FEFETs feature separation of read-write paths, non-destructive read, and high distinguishability while retaining the benefits of electric field-driven write (Yu et al, 2021) and offering other advantages such as multilevel storage (Ni et al, 2018;Dutta et al, 2020;Kazemi et al, 2020;Liao et al, 2021). However, they are known to suffer from variability, endurance, and retention concerns due to traps at the ferroelectric-dielectric interface and depolarization fields in the ferroelectric.…”