Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors

Ubal, Rafael; Sahuquillo, Julio; Petit, Salvador; López, Pedro

doi:10.1109/sbac-pad.2007.17

Cited by 147 publications

(74 citation statements)

References 7 publications

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“…Experimental evaluation has been conducted by extending the Multi2Sim simulation framework [17], to model the system described in Section 3. As stated before, experiments considered a two-core processor implementing three hardware threads each.…”

Section: Resultsmentioning

confidence: 99%

A Dynamic Power-Aware Partitioner with Task Migration for Multicore Embedded Systems

March

Sahuquillo

Petit

et al. 2011

Euro-Par 2011 Parallel Processing

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Abstract. Nowadays, a key design issue in embedded systems is how to reduce the power consumption, since batteries have a limited energy budget. For this purpose, several techniques such as Dynamic Voltage Scaling (DVS) or task migration can be used. DVS allows reducing power by selecting the optimal voltage supply, while task migration achieves this effect by balancing the workload among cores. This paper first analyzes the impact on energy due to task migration in multicore embedded systems with DVS capability and using the well-known Worst Fit (WF) partitioning heuristic. To reduce overhead, migrations are only performed at the time that a task arrives to and/or leaves the system and, in such a case, only one migration is allowed. The huge potential on energy saving due to task migration, leads us to propose a new dynamic partitioner, namely DP, that migrates tasks in a more efficient way than typical partitioners. Unlike WF, the proposed algorithm examines which is the optimal target core before allowing a migration. Experimental results show that DP can improve energy consumption in a factor up to 2.74 over the typical WF algorithm.

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Section: Resultsmentioning

confidence: 99%

A Dynamic Power-Aware Partitioner with Task Migration for Multicore Embedded Systems

March

Sahuquillo

Petit

et al. 2011

Euro-Par 2011 Parallel Processing

Self Cite

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“…sections are identified by a name and contain useful data for program loading or debugging. They are labeled with a set of flags that indicate its type and the way they have to be handled during the program loading [3]. When cited, "libbfd" library equips the analysis of the ELF file.…”

Section: Simulation Frameworkmentioning

confidence: 99%

Interconnect Network on Chip Topology in Multi-core Processors: A Comparative Study

Khari¹,

Kumar²,

Le³

et al. 2017

IJCNIS

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Abstract-A variety of technologies in recent years have been developed in designing on-chip networks with the multicore system. In this endeavor, network interfaces mainly differ in the way a network physically connects to a multicore system along with the data path. Semantic substances of communication for a multicore system are transmitted as data packets. Thus, whenever a communication is made from a network, it is first segmented into sub-packets and then into fixed-length bits for flow control digits. To measure required space, energy & latency overheads for the implementation of various interconnection topologies we will be using multi2sim simulator tool that will act as research bed to experiment various tradeoffs between performance and power, and between performance and area requires analysis for further possible optimizations.

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“…It provides a number of instrumentation capabilities that enable research in application characterization, code optimization, compiler optimization, and hardware architecture design. [22] …”

Section: Commonly Used Measurement Toolsmentioning

confidence: 99%

Power Aware Computing Survey

Hassan¹,

Moussa²

2014

IJCA

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Power-aware computing has caught the interest of researchers and users of all computing systems. In embedded systems and small devices, better management of energy translates into longer lasting and smaller batteries, which in turn implies smaller and lighter devices. In cloud, distributed, and high performance computing systems, better management of power translates into saving a significant amount of money and natural resources. This paper surveys the different poweraware computing approaches and techniques, focusing mostly on software approaches. It also introduces power-aware computing and why it is very important these days. The paper discusses the ways and challenges of measuring the energy consumption of systems and devices.

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Multi2Sim: A Simulation Framework to Evaluate Multicore-Multithreaded Processors

Cited by 147 publications

References 7 publications

A Dynamic Power-Aware Partitioner with Task Migration for Multicore Embedded Systems

A Dynamic Power-Aware Partitioner with Task Migration for Multicore Embedded Systems

Interconnect Network on Chip Topology in Multi-core Processors: A Comparative Study

Power Aware Computing Survey

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