2019
DOI: 10.1088/2631-8695/ab5024
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Multi-valued charge trapping memory based on amorphous-indium-gallium-zinc oxide thin film transistor with designed Ga 2 O 3 /Al 2 O 3 stack insulator

Abstract: Multi-valued charge trapping memory is demonstrated based on an amorphous-indium-gallium-zinc oxide thin-film transistor (a-IGZO-TFT) with a Ga 2 O 3 /Al 2 O 3 stack gate insulator. The memory device shows a positive shift of threshold voltage as large as 12.6 V after +20 V/1 s programming. The erasing process can be divided into two stages. Vertical electrical field erases the trapped electrons partially, resulting in negative threshold voltage shift with hump current in sub-threshold region. It is defined as… Show more

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(1 citation statement)
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“…This structure refers to a sandwich-like stack of blocking layer (BL) interfacing with gate electrode to reduce leakage current, chargetrapping layer (CTL) providing abundant trap sites to capture/release carriers when the program/erase signal is applied, and tunneling layer (TL) interfacing with IGZO to prevent trapped carriers diffusing back to IGZO. [152]- [154] The commonly used materials for CTL include SiNx [155] , HfO2 [156] , defect-engineered AlOx [157], [158] , Sm2O3 [159] , etc. P. Ma designed and demonstrated a charge-trapping-flash (CTF) memory with IGZO channel in combination with an Alumina-based gate stack (Fig.…”
Section: Charge-trapping-flash Transistor Memory: Positive Gate Bias ...mentioning
confidence: 99%
“…This structure refers to a sandwich-like stack of blocking layer (BL) interfacing with gate electrode to reduce leakage current, chargetrapping layer (CTL) providing abundant trap sites to capture/release carriers when the program/erase signal is applied, and tunneling layer (TL) interfacing with IGZO to prevent trapped carriers diffusing back to IGZO. [152]- [154] The commonly used materials for CTL include SiNx [155] , HfO2 [156] , defect-engineered AlOx [157], [158] , Sm2O3 [159] , etc. P. Ma designed and demonstrated a charge-trapping-flash (CTF) memory with IGZO channel in combination with an Alumina-based gate stack (Fig.…”
Section: Charge-trapping-flash Transistor Memory: Positive Gate Bias ...mentioning
confidence: 99%