Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it’s potential applications for Power-Via technologies

Liao, Bo-Zhou; Chen, Liang-Hsi; Chen, Kai-Cheng; Lin, Hongyi; Tsai, Yi‐Ting; Chen, Ting-Wei; Chan, Yi-Cheng; Lee, Min-Hung; Liao, Ming-Han

doi:10.1109/ectc51906.2022.00285

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Multi-Layer Chips on Wafer Stacking Technologies with Carbon Nano-Tubes as Through-Silicon Vias and it’s potential applications for Power-Via technologies

Cited by 2 publications

References 11 publications

The Advantages of Low temperature (<400°C) Carbon Nano-Tubes (CNTs) as Through Silicon Vias (TSVs) in Multi-Layer Stacking and Backside Power-Via Application

The Advantages of Low temperature (<400°C) Carbon Nano-Tubes (CNTs) as Through Silicon Vias (TSVs) in Multi-Layer Stacking and Backside Power-Via Application

The Analysis of Multiwall Carbon Nanotubes as Through Silicon Via by Equivalent Circuit Model at Different Operating Temperatures in Multilayers Stacking Scheme

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