Multi-gigabit/s digital multiplexing with EBS devices

Abstract

Two design approaches are presented to an EBS signal processor that multiplexes multiple input data lines into a single output (parallel-to-serial conversion) with 2 Gbit/s serial output data rate. The first approach uses a CRT-type electron gun, eight input gates, and one silicon diode target. The second approach uses multiple electron sources, multiple input gates, and a single silicon diode target. A gating system is used to present to the t a rget a 0.5-ns aperture time per electron gun. This approach is much less sensitive to misalignment and power supply and R F input drive instabilities than the fir st approach. In addition, higher output signal amplitudes and a smaller tube were achieved. Output pulse characteristics demonstrated at the 2 Gbit/s data rate are 5 t o 7V pulse amplitude into 50n and less than 0.25 ns pulse risetime.