2018 IEEE Topical Conference on RF/Microwave Power Amplifiers for Radio and Wireless Applications (PAWR) 2018
DOI: 10.1109/pawr.2018.8310064
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Multi-dimensional LUT-based digital predistorter for concurrent dual-band envelope tracking power amplifier linearization

Abstract: This paper presents a multi lookup table (LUT) implementation scheme for the 3D distributed memory polynomial (3D-DMP) behavioral model used in Digital Predistortion (DPD) linearization for concurrent dual-band envelope tracking (ET) power amplifiers (PAs). The proposed 3D-Distributed Memory LUTs (3D-DML) architecture is suitable for efficient FPGA implementation. In order to optimize the linearization performance as well as to reduce the number of resources of the 3D-DML model, a new variant of the Orthogonal… Show more

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Cited by 8 publications
(21 citation statements)
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“…This can cause an ill-conditioned least squares (LS) estimation and at the same time increases the computational complexity of the overall DPD system. Consequently, a lot of effort has been made to reduce the number of parameters of the DPD [6]- [9].…”
Section: Introductionmentioning
confidence: 99%
“…This can cause an ill-conditioned least squares (LS) estimation and at the same time increases the computational complexity of the overall DPD system. Consequently, a lot of effort has been made to reduce the number of parameters of the DPD [6]- [9].…”
Section: Introductionmentioning
confidence: 99%
“…With this goal in mind, in the PAWR2018 paper [10], we took the 3-D distributed memory polynomial DPD model (proposed in [7] to compensate for the in-band and cross-band intermodulation distortion as well as for the slow-envelope dependent distortion that appears when supplying the PA with a slower version of the DB envelope) and presented a new multi-LUT architecture suitable for FPGA implementation. The proposed 3-D distributed memory LUT (3D-DML) model followed a multi-LUT architecture with linear/bilinear interpolation and extrapolation as defined by Molina et al in [11].…”
Section: Introductionmentioning
confidence: 99%
“…The proposed 3-D distributed memory LUT (3D-DML) model followed a multi-LUT architecture with linear/bilinear interpolation and extrapolation as defined by Molina et al in [11]. In addition, in order to properly select the minimum number of LUTs of the 3D-DML model to meet the required linearity specifications, a modified version of the Orthogonal Matching Pursuit (OMP) algorithm [12], named OMP-LUT, was presented in [10].…”
Section: Introductionmentioning
confidence: 99%
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