2017 IEEE East-West Design &Amp; Test Symposium (EWDTS) 2017
DOI: 10.1109/ewdts.2017.8110053
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Multi-bit fault tolerant design for resistive memories through dynamic partitioning

Sutapa Sarkar
1
,
Mousumi Saha
2
,
Biplab K. Sikdar
3
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Cited by 6 publications
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