Multi-beam patterning technology and mask making beyond 5nm

Abstract

The wafer manufacturing industry has increased pattern complexity of the main feature and sub-resolution assist feature (SRAF) required for improving the EUV lithography process window and enabling the leading-edge technology nodes. In parallel, Inverse Lithography Technology (ILT) and its requirements of curvilinear data structure has gained momentum in recent years, putting the pressure on mask makers, in particular the mask writer. To fulfill the curvilinear feature requirements of high pattern resolution and large data volume, the mask writer needs to develop innovative techniques and update its error compensation strategies. In this paper, we will investigate the pattern resolution, local critical dimension uniformity (LCDU), and line edge roughness (LER) and explore the projected improvements in multi-beam writer technology and highlight its capability against EUV lithography requirements. We will also investigate the role of resist and process on these critical mask metrics to illustrate the overall performance against wafer requirements. EUV mask exposure tests were conducted at Intel Mask Operation (IMO) on a MBMW201 multi-beam writer to study the effects of writing beam diameter and associate blurs, mask exposure dose, and photoresist on pattern resolution, LCDU, and LER. An analytical model was also used to predict the trend and determine the dependency of these lithographic metrics on the writer exposure conditions.