Motion vector predictor architecture for H.264/AVC Main profile targeting HDTV 1080p

Abstract

This article presents an architecture for a motion vectors predictor using H.264/AVC standard Main profile. The motion vectors predictor is one of the most important modules of motion compensation. This architecture was developed to work at 100 MHz, providing a processing rate capable of decoding HDTV in real time. The hardware is composed by a bank of registers and a state machine operating over the registered data. The design was synthesized for FPGA Xilinx Virtex II-PRO and ASIC TSMC 0,18µm technology reaching maximum frequency of operation of 133 MHz and 129 MHz, respectively.