Mosaic Pages: Big TLB Reach with Small Pages

Gosakan, Krishnan; Han, Jaehyun; Kuszmaul, William; Mubarek, Ibrahim N.; Mukherjee, Nirjhar; Sriram, Karthik; Tagliavini, Guido; West, Evan; Bender, Michael A.; Bhattacharjee, Abhishek; Conway, Alex; Farach-Colton, Martı́n; Gandhi, Jayneel; Johnson, Rob; Kannan, Sudarsun; Porter, Donald E.

doi:10.1145/3582016.3582021

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Cited by 5 publications

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Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs

Feng,

Na,

Kim

et al. 2024

2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)

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Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs

Feng,

Na,

Kim

et al. 2024

2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)

View full text Add to dashboard Cite

DyLeCT: Achieving Huge-page-like Translation Performance for Hardware-compressed Memory

Panwar,

Laghari,

Choukse

et al. 2024

2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)

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MEMTIS: Efficient Memory Tiering with Dynamic Page Classification and Page Size Determination

Lee,

Monga,

Min

et al. 2023

Proceedings of the 29th Symposium on Operating Systems Principles

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The evergrowing memory demand fueled by datacenter workloads is the driving force behind new memory technology innovations (e.g., NVM, CXL). Tiered memory is a promising solution which harnesses such multiple memory types with varying capacity, latency, and cost characteristics in an effort to reduce server hardware costs while fulfilling memory demand. Prior works on memory tiering make suboptimal (often pathological) page placement decisions because they rely on various heuristics and static thresholds without considering overall memory access distribution. Also, deciding the appropriate page size for an application is difficult as huge pages are not always beneficial as a result of skewed accesses within them. We present Memtis, a tiered memory system that adopts informed decision-making for page placement and page size determination. Memtis leverages access distribution of allocated pages to optimally approximate the hot data set to the fast tier capacity. Moreover, Memtis dynamically determines the page size that allows applications to use huge pages while avoiding their drawbacks by detecting inefficient use of fast tier memory and splintering them if necessary. Our evaluation shows that Memtis outperforms state-of-the-art tiering systems by up to 169.0% and their best by up to 33.6%.CCS Concepts: • Software and its engineering → Memory management; • Computer systems organization → Heterogeneous (hybrid) systems.

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Mosaic Pages: Big TLB Reach with Small Pages

Cited by 5 publications

References 52 publications

Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs

Barre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs

DyLeCT: Achieving Huge-page-like Translation Performance for Hardware-compressed Memory

MEMTIS: Efficient Memory Tiering with Dynamic Page Classification and Page Size Determination

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