2019
DOI: 10.1002/adfm.201905970
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MoS2/MoTe2 Heterostructure Tunnel FETs Using Gated Schottky Contacts

Abstract: Abstract2D transition metal dichalcogenide based van der Waals materials are promising candidates to realize tunnel field effect transistors (TFETs) with a steep subthreshold swing (SS) for low‐power applications. Their atomically flat, self‐passivated layers offer potentially defect free interlayer tunneling. There are still several issues that need to be addressed to experimentally achieve a steep SS, e.g., the Schottky contacts, impact of thick layers, and device architecture with respect to gate configurat… Show more

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Cited by 55 publications
(32 citation statements)
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“…For the first strategy, efficient approaches have been proposed including but not limited to insertion of a thin tunnel buffer layer between contact and 2D semiconductor, [ 85 ] creation edge contact, [ 86 ] application of vdW metallic materials such as graphene [ 87 ] and metallic‐phase TMDCs, [ 88 ] and engineering the contact area of the 2D channel into metallic phase or high‐doping states. [ 89,90 ] On the other side, optimization of the contacts fabrication process is critical to achieve low‐resistance contact by ruling out interface states originating from adsorbed contaminants, chemical reaction between contact metal and 2D semiconductor, damaged 2D layer surface by “high‐energy” metal deposition and photolithography process, etc. [ 82,83 ] For this, useful methods such as direct dry transfer of metal electrodes onto 2D channels avoiding interfacial reaction, [ 82,91 ] high‐vacuum deposition of soft indium metal electrode [ 83 ] and thermal nanolithography which can pattern electrode area by scanning tip leaving residue‐free 2D material surface [ 84 ] have been reported.…”
Section: D Semiconductor/ferroelectric Heterostructure Fabrication Amentioning
confidence: 99%
“…For the first strategy, efficient approaches have been proposed including but not limited to insertion of a thin tunnel buffer layer between contact and 2D semiconductor, [ 85 ] creation edge contact, [ 86 ] application of vdW metallic materials such as graphene [ 87 ] and metallic‐phase TMDCs, [ 88 ] and engineering the contact area of the 2D channel into metallic phase or high‐doping states. [ 89,90 ] On the other side, optimization of the contacts fabrication process is critical to achieve low‐resistance contact by ruling out interface states originating from adsorbed contaminants, chemical reaction between contact metal and 2D semiconductor, damaged 2D layer surface by “high‐energy” metal deposition and photolithography process, etc. [ 82,83 ] For this, useful methods such as direct dry transfer of metal electrodes onto 2D channels avoiding interfacial reaction, [ 82,91 ] high‐vacuum deposition of soft indium metal electrode [ 83 ] and thermal nanolithography which can pattern electrode area by scanning tip leaving residue‐free 2D material surface [ 84 ] have been reported.…”
Section: D Semiconductor/ferroelectric Heterostructure Fabrication Amentioning
confidence: 99%
“…Two-dimensional (2D) materials are highly promising for use in bilayer TFETs with both high drive currents and low SS because the shorter tunneling distance and strong gate controllability can be expected from the van der Waals gap distances and the atomically sharp heterointerfaces that form independent of lattice matching and dangling bonds. Despite intensive research on many 2D TFET systems, [15][16][17][18][19][20][21][22][23][24][25][26][27] devices with SS values of sub-60 mVdec -1 over several decades of drain current have rarely been demonstrated, 28 with the exception of devices utilizing ion gating with extremely high gate capacitance, however these types of devices are incapable of being integrated. 8,18,27 There are two main issues to overcome for 2D TFETs.…”
Section: Introductionmentioning
confidence: 99%
“…29,30 The typical intrinsic high doping crystals like black phosphorus (BP) and SnSe2 are not tolerant to oxidation and result in the formation of interlayer oxides. 24,31 Although local electrostatic doping in dual gate structures is often applied, 15,24,25,28 the structure of these types of devices becomes complicated and increases the parasitic capacitance unfavorably. Recently, by using a p + -WSe2 source that was doped by charge transfer from a WOx surface oxide layer, clear BTBT was successfully demonstrated in a stable n-MoS2/p + -WSe2 TFET.…”
Section: Introductionmentioning
confidence: 99%
“…Even a tunnel FET based on vertical vdW heterojunctions has resulted in a promising SS of sub-60 mV dec −1 ; however, interface issues always limit device fabrication and result in experimental results far deviating from theoretical predictions [144]. Another type of 2D tunnel FET employs the traditional p-i-n structure, where a natural heterojunction is formed by spatially varying the thickness in one flake of BP [145,146].…”
Section: Tunnel Fetsmentioning
confidence: 99%