2020
DOI: 10.48550/arxiv.2009.13701
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Montage: A General System for Buffered Durably Linearizable Data Structures

Haosen Wen,
Wentao Cai,
Mingzhe Du
et al.

Abstract: The recent emergence of fast, dense, nonvolatile main memory suggests that certain long-lived data might remain in its natural pointer-rich format across program runs and hardware reboots. Operations on such data must be instrumented with explicit write-back and fence instructions to ensure consistency in the wake of a crash. Techniques to minimize the cost of this instrumentation are an active topic of research.We present what we believe to be the first general-purpose approach to building buffered durably li… Show more

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citations
Cited by 2 publications
(5 citation statements)
references
References 24 publications
(36 reference statements)
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“…While the recently-launched Intel Ice Lake processors with Optane persistent memory 200 series may provide flush instructions that do not invalidate the flushed cache lines, existing NVRAM architectures with Cascade Lake processors do not seem to support such instructions. Our impression is corroborated in the findings of [5,15,17,20,28,49,51]. Existing (costly) architectures will probably remain in use for years to come and one needs to use algorithmic modifications to obtain improved performance on such machines.…”
Section: Introductionsupporting
confidence: 57%
See 1 more Smart Citation
“…While the recently-launched Intel Ice Lake processors with Optane persistent memory 200 series may provide flush instructions that do not invalidate the flushed cache lines, existing NVRAM architectures with Cascade Lake processors do not seem to support such instructions. Our impression is corroborated in the findings of [5,15,17,20,28,49,51]. Existing (costly) architectures will probably remain in use for years to come and one needs to use algorithmic modifications to obtain improved performance on such machines.…”
Section: Introductionsupporting
confidence: 57%
“…This is also noted by others [e.g. 5,15,17,20,28,49,51]. The recently-launched Third Generation Intel Xeon Scalable Ice Lake processors with Optane persistent memory 200 series may implement CLWB retaining lines in the cache, but NVRAM platforms currently in the market do not seem to support flushes without cache invalidation.…”
Section: Modelmentioning
confidence: 73%
“…Both Dalí and InCLL employ techniques that might be applicable in principle to other data structures. To the best of our knowledge, however, the Montage system of Wen et al [54] is the only existing general-purpose system for buffered durable linearizable structures. It also has the advantage of persisting only semantically essential data.…”
Section: Related Workmentioning
confidence: 99%
“…Other data may reside in transient memory. The original system API [54] is designed primarily for lock-based data structures, but also includes support for nonblocking operations (with blocking advance of the persistence frontier). The typical operation is bracketed by calls to begin op and end op.…”
Section: The Original Montagementioning
confidence: 99%
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