2005
DOI: 10.1049/el:20050006
|View full text |Cite
|
Sign up to set email alerts
|

Monolithic digital galvanic isolation buffer fabricated in silicon on sapphire CMOS

Abstract: A monolithic four-channel digital galvanic isolation buffer in the 0.5 mm silicon on sapphire (SOS) CMOS technology is reported. Advantage is taken of the insulating properties of the sapphire substrate to integrate on the same die both the isolation structure and the interface electronics. Each isolation channel has been tested to operate at data rates over 100 Mbit=s. The system can tolerate ground bounces of 1 V=ms and is tested for 800 V isolation. The system includes an integrated isolation charge pump to… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

0
3
0

Year Published

2006
2006
2023
2023

Publication Types

Select...
5
1

Relationship

0
6

Authors

Journals

citations
Cited by 15 publications
(4 citation statements)
references
References 7 publications
0
3
0
Order By: Relevance
“…The capacitive coupling enables electrical insulation between the ICs inside a chip. This condition makes CPT special for the projected sensitive instruments, which need to be decoupled from the noise [219]. Wireless capacitive power and data transfer are considered using bidirectional communication [218], using a subharmonic resonant system [217], and using multiple receivers [216].…”
Section: ) Integrated Circuitsmentioning
confidence: 99%
“…The capacitive coupling enables electrical insulation between the ICs inside a chip. This condition makes CPT special for the projected sensitive instruments, which need to be decoupled from the noise [219]. Wireless capacitive power and data transfer are considered using bidirectional communication [218], using a subharmonic resonant system [217], and using multiple receivers [216].…”
Section: ) Integrated Circuitsmentioning
confidence: 99%
“…In addition, capacitive techniques are well-suited for high-speed data transfer due to their higher EMI. However, because of the fast ground shift (in hundreds of kV/µs) between the two circuit domains, capacitive techniques have lower common mode transient immunity (CMTI) [14][15][16]. This common mode current, which is proportional to the capacitor size, may corrupt data transfer and increase the bit error rate (BER).…”
Section: Introductionmentioning
confidence: 99%
“…No ground connection is necessary what avoids ground loops and reduces wiring complexity. Industry‐established applications include digital isolator integrated circuits (ICs) [1], isolated RS‐485 transmission systems [2] and the replacement of Ethernet magnetics [3]. Moreover, capacitive coupled signalling is proposed for IGBT drivers [4] and distributed battery management systems [5].…”
Section: Introductionmentioning
confidence: 99%