Monolithic 3D+-IC Based Massively Parallel Compute-in-Memory Macro for Accelerating Database and Machine Learning Primitives

Ramanathan, Akshay Krishna; Rangachar, Srivatsa Srinivasa; Hung, Je-Min; Lee, Chun-Ying; Xue, Cheng-Xin; Huang, Sheng-Po; Hsueh, Fu-Kuo; Shen, Chang‐Hong; Shieh, Jia-Min; Yeh, Wen–Kuan; Ho, Mon−Shu; Govindarajan, Hariram Thirucherai; Sampson, Jack; Chang, Meng‐Fan; Narayanan, Vijaykrishnan

doi:10.1109/iedm13553.2020.9372111

Cited by 9 publications

(4 citation statements)

References 9 publications

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“…Content Addressable Memory: Several ternary and binary CAM designs have been proposed in recent years, including CMOS-based [16], [43]- [52], as well as emerging memory based [5], [9], [13], [53], [54] solutions. Several emerging memory (memristor crossbar) approximate search CAM designs have also been proposed [55], [56].…”

Section: Related Workmentioning

confidence: 99%

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Garzón

Lanuzza

Teman

et al. 2023

IEEE J. Emerg. Sel. Topics Circuits Syst.

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In-memory computing seeks to minimize data movement and alleviate the memory wall by computing in-situ, in the same place that the data is located. One of the key emerging technologies that promises to enable such computing-inmemory is spin-transfer torque magnetic tunnel junction (STT-MTJ). This paper proposes AM 4 , a combined STT-MTJ-based Content Addressable Memory (CAM), Ternary CAM (TCAM), approximate matching (similarity search) CAM (ACAM), and in-memory Associative Processor (AP) design, inspired by the recently announced Samsung MRAM crossbar. We demonstrate and evaluate the performance and energy-efficiency of the AM 4based AP using a variety of data intensive workloads. We show that an AM 4 -based AP outperforms state-of-the-art solutions both in performance (with the average speedup of about 10 ×) and energy-efficiency (by about 60 × on average).

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Section: Related Workmentioning

confidence: 99%

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Garzón

Lanuzza

Teman

et al. 2023

IEEE J. Emerg. Sel. Topics Circuits Syst.

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“…Many ternary and binary NOR-and NAND-based CAM cell designs have been proposed in recent years, including CMOS-based [26]- [40], as well as emerging memory based [41]- [45] solutions. Several CAM designs offer softerror tolerance using error correction coding (which requires memory redundancy) and replacing the matchline sense amplifier with an analog comparator [21], [22].…”

Section: B Approximate Content-addressable Memorymentioning

confidence: 99%

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification

et al. 2022

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This paper proposes a novel Hamming distance tolerant content-addressable memory (HD-CAM) for energy-efficient in-memory approximate matching applications. HD-CAM exploits NOR-type based static associative memory bitcells, where we add circuitry to enable approximate search with programmable tolerance. HD-CAM implements approximate search using matchline charge redistribution rather than its rise or fall time, frequently employed in state-of-the-art solutions. HD-CAM was designed in a 65 nm 1.2 V CMOS technology and evaluated through extensive Monte Carlo simulations. Our analysis shows that HD-CAM supports robust operation under significant process variations and changes in the design parameters, enabling a wide range of mismatch threshold (tolerable Hamming distance) levels and pattern lengths. HD-CAM was functionally evaluated for virus DNA classification, which makes HD-CAM suitable for hardware acceleration of genomic surveillance of viral outbreaks, such as Covid-19 pandemics.

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“…To this end, the metal droplet catalyzed growth has an outstanding advantage, as most of them can proceed at a relatively low temperature <500 °C, particularly for the IPSLS approach where a group of low melting point metals, such as In, Sn and Ga, are used as catalyst [116,117]. Note that, 3D monolithic stacking integration of logic/memory units in the back-end layer has been widely considered as a promising new architecture to overcome the fundamental limitations in the traditional von-Neumann architecture, and to achieve higher integration density, faster operations and explore new neuromorphic functionalities [118,119]. (iii) Third, as the most important capability for scalable and reliable device integration, the vertical and lateral SiNW channels have to be precisely controlled and tailored, in terms of the position, diameter, crystalline orientation and doping polarity.…”

Section: Compatibility and Scalability Of 3d-grown Nwsmentioning

confidence: 99%

Review on 3D growth engineering and integration of nanowires for advanced nanoelectronics and sensor applications

Hu¹,

Yu²

2022

Nanotechnology

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Recent years have witnessed increasing efforts devoted to the growth, assembly and integration of quasi-one dimensional (1D) nanowires (NWs), as fundamental building blocks in advanced three-dimensional (3D) architecture, to explore a series of novel nanoelectronic and sensor applications constructed. An important motivation behind is to boost the integration density of the electronic devices by stacking more functional units in the out-of-plane z-direction, where the NWs are supposed to be patterned or grown as vertically standing or laterally stacked channels to minimize their footprint area. The another driving force is derived from the unique possibility of engineering the 1D NWs into more complex, as well as more functional, 3D nanostructures, such as helical springs and kinked probes, which are ideal nanostructures for developping advanced nanoelectromechanical system (NEMS), bio-sensing and manipulation applications. This Review will first examine the recent progresses made in the construction of 3D nano electronic devices, as well as the new fabrication and growth technologies established to enable an efficient 3D integration of the vertically standing or laterally stacked NW channels. Then, the different approaches to produce and tailor more sophisticated 3D helical springs or purposely-designed nanoprobes will be revisited, together with their applications in NEMS resonators, bio sensors and stimulators in neural system.

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Monolithic 3D+-IC Based Massively Parallel Compute-in-Memory Macro for Accelerating Database and Machine Learning Primitives

Cited by 9 publications

References 9 publications

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification

Review on 3D growth engineering and integration of nanowires for advanced nanoelectronics and sensor applications

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Monolithic 3D+-IC Based Massively Parallel Compute-in-Memory Macro for Accelerating Database and Machine Learning Primitives

Cited by 9 publications

References 9 publications

AM4: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

AM4: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

Hamming Distance Tolerant Content-Addressable Memory (HD-CAM) for DNA Classification

Review on 3D growth engineering and integration of nanowires for advanced nanoelectronics and sensor applications

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Product

Resources

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AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing

AM⁴: MRAM Crossbar Based CAM/TCAM/ACAM/AP for In-Memory Computing