Monolayer black phosphorus and germanium arsenide transistors via van der Waals channel thinning

Li, Wanying; Tao, Quanyang; Li, Zhiwei; Yang, Guanhua; Lu, Zheyi; Chen, Yang; Wen, Yao; Wang, Yiliu; Liao, Lei; Liu, Yuan; He, Jun

doi:10.1038/s41928-023-01087-8

Cited by 6 publications

(3 citation statements)

References 51 publications

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“…One can see that the vertical MoS 2 FET shows a high room-temperature on-off ratio of 10 3 and an on-state current of ∼100 µA at a very small V DS = 50 mV. And the vertical MoS 2 FET delivers an ultrahigh current density of approximately 143 A cm −2 [2] at V DS = 50 mV and V GS = 18 V (where V GS represents the applied gate voltage), normalized by the overlapped channel area of around 70 µm 2 between bottom Gr and top Au electrodes. Much higher current density (∼1.1 × 10 4 A cm −2 ) can be obtained by continuously increasing drain voltage to V DS = 2 V; but the device on-off ratio will dramatically decrease due to drain-induced barrier lowering (DIBL) and thermal-assisted tunneling effects (supplementary material section II, figure S5).…”

Section: Resultsmentioning

confidence: 97%

“…Atomically thin two-dimensional (2D) materials have recently emerged as a promising material system for electronic device applications, including field-effect transistors (FETs) [1][2][3], diodes [4,5], radio-frequency transistors [6] and memory cells [7][8][9], etc. Semiconductor p-n junctions play a crucial 5 Jinshui Miao, Yueyue Fang, and Yu Jiang contributed equally to this work.…”

Section: Introductionmentioning

confidence: 99%

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Vertically stacked van der Waals heterostructures for three-dimensional circuitry elements

Miao,

Fang,

Jiang

et al. 2024

J. Phys. D: Appl. Phys.

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Two-dimensional (2D) layered materials have been actively explored for electronic device applications because of their ability to form van der Waals heterostructures with unique electronic properties. Vertical integration of atomically thin 2D materials can enable the design of a three-dimensional (3D) circuit which is a promising pathway to continuously increase device density. In this study, we vertically stack 2D materials, such as graphene（Gr）, MoS2, and black phosphorus (BP) to build transistors, heterostructure p-n diodes, and 3D logic circuits. The vertical transistors built from MoS2 or BP semiconductor exhibit a good on-off ratio of up to 103 and a high current density of ~200 Acm-2 at a very small VDS of 50 mV. The Gr/BP/MoS2 vertical heterostructure p-n diodes show a high gate-tunable rectification ratio of 102. Finally, we have demonstrated a 3D CMOS inverter by vertical integration of Gr, BP (p-channel), Gr, MoS2 (n-channel), and a 50-nm-thick gold film in sequence. The ability to vertically stack 2D layered materials by van der Waals interactions offers an alternative way to design future 3D integrated circuits.

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Section: Resultsmentioning

confidence: 97%

Section: Introductionmentioning

confidence: 99%

Vertically stacked van der Waals heterostructures for three-dimensional circuitry elements

Miao,

Fang,

Jiang

et al. 2024

J. Phys. D: Appl. Phys.

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“…In the realm of field-effect transistors (FETs), black phosphorus has been extensively investigated in the literature [10][11][12][13][14][15][16][17][18][19][20][21][22]. Of particular significance is the pursuit of understanding the ballistic performance limits of monolayer BP FETs, which has been a focal point of studies [14,15,23,24].…”

Section: Introductionmentioning

confidence: 99%

Role of Phonon Scattering on the Transport and Performance of an N-Channel Monolayer Black Phosphorus Transistor

Alam

2024

J. Electron. Electric. Eng.

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We investigate the influence of phonon scattering on the transport properties and performance metrics of a monolayer n-channel black phosphorus transistor within a four-band tight binding Hamiltonian, employing a recursive Green's function algorithm and Buttiker probe scattering model. Our analysis reveals that electron-phonon scattering significantly degrades the on-state current, while its effects in the subthreshold region are found to be negligible. Further examination identiﬁes optical phonons as the primary contributors to the degradation of on-state current, with acoustic phonons playing a less prominent role. The ballisticity of the device declines from 42% to 24% when transitioning from solely acoustic phonon scattering to the combined inﬂuence of acoustic and optical phonons. Expanding the placement of Buttiker probes from beneath the gate region to cover the entire path from source to drain results in a further 48% reduction in on-state current. The on-state current exhibits a parabolic relationship with the inverse Kelvin temperature. To quantify the effects of phonon scattering on device performance, we assess the key parameters, transconductance and unity current gain frequency. Phonon scattering is observed to severely impact both the parameters. The on-state transconductance declines from its ballistic value of 24.9 mS/µm to 3.99 mS/µm when both acoustic and optical phonons are concurrently active. Similarly, the unity current gain frequency decreases from 1.18 to 0.2 THz due to phonon scattering. Additionally, our analysis reveals that approximately 7–9% of the total power dissipated within the device is attributed to phonon scattering effects, while the remainder is released through thermalization in the device's contacts. Phonon scattering is shown to induce both lattice cooling and heating, depending on the presence or absence of potential barriers. When a potential barrier exists in the channel, electrons injected from the source experience lattice cooling before the barrier region and lattice heating after crossing the barrier. Including the source and drain contact resistances in our model unveils that achieving a contact resistance value of approximately 100 Ω-µm is crucial for the effective functioning of black phosphorus devices.

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Van der Waals Epitaxial Growth of Ultrathin Indium Antimonide on Arbitrary Substrates through Low‐Thermal Budget

Xiong,

Wen,

Wang

et al. 2024

Advanced Materials

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III–V semiconductors possess high mobility, high frequency response, and detection sensitivity, making them potentially attractive for beyond‐silicon electronics applications. However, the traditional heteroepitaxy of III–V semiconductors is impeded by a significant lattice mismatch and the necessity for extreme vacuum and high temperature conditions due to the low saturated vapor pressures of their constituent metals, thereby impeding their in situ compatibility with flexible substrates and silicon‐based circuits. In this study, we present a novel approach to fabricate ultrathin InSb single‐crystal nanosheets on arbitrary substrates with a thickness as thin as 2.4 nm using low‐thermal‐budget Van der Waals (vdW) epitaxy through chemical vapor deposition (CVD). In particular, we have successfully achieved in‐situ growth on both silicon‐based substrates and flexible polyimide substrates. Notably, the growth temperature required for InSb nanosheets (240 °C) is significantly lower than that employed in back‐end‐of‐line processes (400 °C). The field effect transistor (FET) devices based on fabricated ultrathin InSb nanosheets exhibit ultra‐high On‐off ratio exceeding 108 and demonstrate minimal gate leakage currents. Furthermore, these ultrathin InSb nanosheet display p‐type characteristics with hole mobilities reaching up to 203 cm2v−1s−1 at room temperatures. This study paves the way for achieving heterogeneous integration of III–V semiconductors, ensuring compatibility with existing integrated circuit architecture and facilitating their application in flexible electronics, thereby realizing the potential of III–V nanometer‐scale logic transistors.This article is protected by copyright. All rights reserved

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Monolayer black phosphorus and germanium arsenide transistors via van der Waals channel thinning

Cited by 6 publications

References 51 publications

Vertically stacked van der Waals heterostructures for three-dimensional circuitry elements

Vertically stacked van der Waals heterostructures for three-dimensional circuitry elements

Role of Phonon Scattering on the Transport and Performance of an N-Channel Monolayer Black Phosphorus Transistor

Van der Waals Epitaxial Growth of Ultrathin Indium Antimonide on Arbitrary Substrates through Low‐Thermal Budget

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