Modified signed-digit arithmetic based on redundant bit representation

Huang, Hongxin; Itoh, Masahide; Yatagai, Toyohiko

doi:10.1364/ao.33.006146

Cited by 35 publications

(14 citation statements)

References 23 publications

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“…Further, note that our proposed TSD and QSD adder/subtracter can also be implemented using matrix-multiplication-based techniques. 18,20,22,24 …”

Section: Discussionmentioning

confidence: 99%

“…Using nonconventional number representations 2 ͑nonbinary͒ to design fast arithmetic units has gained much attention in recent years. Several nonbinary number representation schemes such as multiplevalued fixed radix-number, 3,4 residue number, 5-8 redundant number, 9 and signed-digit [9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25] were reported in the past decade to implement efficient arithmetic operations.…”

Section: Introductionmentioning

confidence: 99%

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Classified one-step high-radix signed-digit arithmetic units

Cherri

1998

Opt. Eng

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High-radix number systems enable higher information storage density, less complexity, fewer system components, and fewer cascaded gates and operations. A simple one-step fully parallel high-radix signed-digit arithmetic is proposed for parallel optical computing based on new joint spatial encodings. This reduces hardware requirements and improves throughput by reducing the space-bandwidth product needed. The high-radix signed-digit arithmetic operations are based on classifying the neighboring input digit pairs into various groups to reduce the computation rules. A new joint spatial encoding technique is developed to present both the operands and the computation rules. This technique increases the spatial bandwidth product (SBWP) of the spatial light modulators (SLMs) of the system. An optical implementation of the proposed high-radix signed-digit arithmetic operations is also presented. It is shown that our one-step trinary signed-digit (TSD) and quarternary signed-digit (QSD) arithmetic units are much simpler and better than all previously reported high-radix signed-digit techniques.

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“…Further, note that our proposed TSD and QSD adder/subtracter can also be implemented using matrix-multiplication-based techniques. 18,20,22,24 …”

Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Classified one-step high-radix signed-digit arithmetic units

Cherri

1998

Opt. Eng

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“…Based on BP encoding of MSD digits, the computation rules shown in Table I can be implemented by (using the case D3 of Table 2), gl =A1*B0+AO*B1, (2) g~=A1*B1+AO*BO,' (4) g4=A1*B0+AO*B1, (5) g6=gl +g4=(A1+A1)*B0+AO*(B1+B1), (7) g7=gb+g2+g~+g5=(A1+A1)*(B1+B1)+AO*BO, (8) g8=gb+gl+g2=A1+AO*B1, (9) gg=g~+g4+g5=A1+AO*B1+AO*BO, (10) C1=g7*(go'+gl'*g8")+g6*(g3'+g4'*g8")' (11) C1=g7*(g5'+g4'*g9")+g6*(g2'+gl'*g9")' (12) C0=g6*(go'+gl '*g8")+g7*(g3'+g4*g8") +g6*(g5'+g4'*g ")+g (g +g g ") (13) where "+" and "*" denote pixel wise addition and multiplication, gi (i=0, . .…”

Section: Modified Signed-digit Addition Algorithmmentioning

confidence: 99%

Optical Module for Modified Signed-Digit Computing Based on Bit Plane Encoding and Pattern Operations

Huang

Itoh

Yatagai

1995

OPT REV

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~ 305 Japan Based on Bit PlaneWe propose here a new optical modified signed-digit (MSD) adder module based on bit plane pattern encoding of MSD digits and pattern operations. The pattern operations required in the algorithm are duplication, combination and shifting. They are simply performed by using optical components such as beam splitters, mirrors and parallel plates, instead 0L optical logic arrays. An optical MSD adder module comprised of six properly interacting blocks with all optical components packaged on a common substrate is presented in detail. We analyze the system errors caused by manufacture and alignment of optical components, the information throughput, the intensity nonuniformity and the system volume of the adder module.Key words : modified signed-digit computing, bit plane encoding, parallel optical computing . IntroductionDigital optical computing based on the modified signeddigit (MSD) number system has attracted much attention because the system promises limited carry propagation.1~5)The MSD arithmetic uses three digits 1, O and 1, in the radix-two number system. The inherent redundancy involved in the MSD number system guarantees that the carry and the borrow propagates no more than two bitpositions in performing MSD addition and MSD subtraction. Therefore, one can perform MSD addition and MSD subtraction in three steps, independent of the length of operand words. For the purpose of increasing the computing speeds and simplifying optical hardware, a two-step algorithm and a one-step algorithm are developed using two bit-pairs and three bit-pairs at the same time, respectively.3~5) High-radix MSD arithmetics and multiinput MSD arithmetics have also been suggested,6,7) and several optical implementations of MSD arithmetic have been studied. Generally, MSD computing can be implemented using optical symbolic substitution,8,9) which usually consists of recognition and substitution phases.MSD computing can also be performed with an optical correlator system, with a binary logic operation system and with an optical matrix multiplier system.5,lo-12) In each of these schemes, however, the performance is less competent than the electronic version in terms of system size and flexibility, as the system typically occupies an optical bench of several feet.4) One solution to these problems is to build integrated modules using optical elements on a common substrate.13~15)We have proposed an integrated module constructed with 3x3 bearn splitter cubes to implement MSD computing.16) The module has advantages such as highly parallel operation, a stable and compact system, and no 10gic gate array. However, it requires eight cross-set input transducers for the input of eight pattern variables. Additionally, it uses two steps to implement a one-step MSD algorithm, thus increasing the complexity of intermediary processing. For solving the problems, we report here a new cascadable optical module for implementing MSD computing. The optical MSD adder module proposed consists of several properly interacting functiona...

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“…A number of different ways [4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22] of eliminating or advancing carries have been proposed. Nonbinary encoding such as the residue number system 5,6 and the modified signed-digit ͑MSD͒ number system [7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22] are of significant interest since they can eliminate or limit the carry propagation.…”

Section: Introductionmentioning

confidence: 99%

Programmable modified-signed-digit addition module based on binary logic gates

Zhang

Karim

1999

Opt. Eng

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A new binary logic based modified-signed-digit (MSD) adder is proposed. By encoding MSD digits in pairs of binary bits, each of the four MSD transforms can be represented by two cascaded binary logic operations. This leads to the design of a compact and integrated programmable MSD addition module. The three operation steps in the MSD addition can be realized using this same module simply by programming the decoding masks.

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Modified signed-digit arithmetic based on redundant bit representation

Cited by 35 publications

References 23 publications

Classified one-step high-radix signed-digit arithmetic units

Classified one-step high-radix signed-digit arithmetic units

Optical Module for Modified Signed-Digit Computing Based on Bit Plane Encoding and Pattern Operations

Programmable modified-signed-digit addition module based on binary logic gates

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