Modelling of high-speed interconnection lines and discontinuities

Abstract

For the design and simulation of high speed interconnection systems and fast digital computers it is imperative to consider both the two-dimensional modelling of bus structures in different technologies and to take the presence of so-called discontinuities (e.g. via-holes, line crossings, packages and connectors) into account. The paper presents quasi-TEM capacitance calculations based on an integral equation technique. As typical examples we studied the effect of etching on the impedance of striplines and impedance calculations for the shielded wire configuration. Furthermore, we considered the capacitance of via-holes and of line crossings.