Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reduction

Abstract

A simple generic interconnect architecture is presented to allow effective cancellation of inductive and capacitive noise in high-speed on-chip interconnect lines. The approach is based on the principle of constructing periodically twisted differential line pairs for parallel interconnect segments in order to eliminate the mutual coupling influences. Detailed simulations show that the twisted-differential lines (TDL) provide high-speed and crosstalk-immnune interconnects, compared to single-ended and differential lines.

Crosstalk Analysis of Current-Mode Signalling-CoupledRLCInterconnects Using FDTD Technique

“…The crosstalk distorts the signal. The impact of crosstalk noise in interconnects can be minimized by implementing crosstalk cancellation techniques, such as changing the polarity of the differential crosstalk waveform [29], using twisted differential pair line [30]. Amongst non-ideal effects in interconnects, the crosstalk noise significantly affects the signal integrity and performance of on-chip interconnects and therefore it's modelling and analysis has become an important research issue.…”

Simulation of the Novel Gradually Low-K Dielectric Structure for Crosstalk Reduction in VLSI and Comparison with Low-K Technology

“…In the technology level, optical interconnects [2], nanotube interconnects, 3D-VLSI, and cu/low-K [3]. In the system level, current mode transmission [4], wireless interconnection [5,6], differential mode transmission [7], and serial data bus are existing. In the circuit level, buffer insertion and resizing and balancing [8], noise identification and recovery [9], noise filtering [10], and internal switching reduction are included.…”