Modeling the polysilicon depletion effect and its impact on submicrometer CMOS circuit performance

Arora, N.D.; Rios, Emmanuel Torres; Huang, Cheng−Liang

doi:10.1109/16.381991

Cited by 103 publications

(32 citation statements)

References 15 publications

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“…However, the standard methods for extracting from capacitance-voltage ( ) measurements of large area MOS capacitors are no longer accurate for thin oxides ( 60Å) and consistently result in values larger than real physical thickness. This discrepancy between the electrical and physical/optical characterization techniques is due to the effects of finite thickness of inversion/accumulation layer (including quantum effects) and polysilicon depletion [1]- [4]. Until device simulators can incorporate these effects, there exists an urgent need to identify and characterize the difference between the electrical and physical values of .…”

mentioning

confidence: 99%

“…is a function of the applied gate voltage (substrate grounded) and is given by (2) where is the Si surface potential, is the flat-band voltage, and is the voltage drop in the poly. and are given by (3) (4) where in eV ( being electron charge), is workfunction difference between poly and Si, is effective charge at Si/SiO interface, is oxide capacitance, and and are permittivities of SiO and Si, respectively. For thin, goodquality gate oxides, V ( /cm ), and is negligible compared to .…”

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confidence: 99%

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Accurate determination of ultrathin gate oxide thickness and effective polysilicon doping of CMOS devices

Gupta

Peng

Song

et al. 1997

IEEE Electron Device Lett.

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Abstract-We present an efficient and accurate method to characterize the physical thickness of ultrathin gate oxides (down to 25Å) and the effective polysilicon doping of advanced CMOS devices. The method is based on the model for Fowler-Nordheim (F-N) tunneling current across the gate oxide with correction in gate voltage to account for the polysilicon-gate depletion. By fitting the model to measured data, both the gate oxide thickness and the effective poly doping are unambiguously determined. Unlike the traditional capacitance-voltage (C0V ) technique that overestimates thin-oxide thickness and requires large area capacitor, this approach results in true physical thickness and the measurement can be performed on a standard sub-half micron transistor. The method is suitable for oxide thickness monitoring in manufacturing environments.

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confidence: 99%

mentioning

confidence: 99%

Accurate determination of ultrathin gate oxide thickness and effective polysilicon doping of CMOS devices

Gupta

Peng

Song

et al. 1997

IEEE Electron Device Lett.

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“…In the sub-100 nm regime, poly-Si electrodes show problems such as gate depletion, high gate resistance, high gate tunneling leakage current, and boron penetration into the channel region. [1,2] It is generally accepted that metal gate electrodes must be introduced along with high-k gate dielectrics, [3] but single metal materials have poor thermal stability and high chemical reactivity at elevated temperatures. So far, a number of metal nitride materials, such as MoN, WN, TiN, HfN, TaN, and TaCN, [4][5][6] have been investigated as a gate electrode for high-k dielectrics.…”

Section: Introductionmentioning

confidence: 99%

Formation of Tantalum Carbide and Nitride Phases in Atomic Layer Deposition Using Hydrogen Plasma and tert‐Butylimido‐tris(diethylamido)‐tantalum (TBTDET), and its Effect on Material Properties

Song

Rhee

2008

Chemical Vapor Deposition

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TaCN films are deposited with plasma-enhanced atomic layer deposition (PEALD) using tert-butylimido-tris(diethylamido)-tantalum and hydrogen. It is confirmed that the film is a homogeneous mixture of TaC, TaN, Ta 3 N 5 , and Ta 2 O 5 with the oxide phase formed from the post-deposition uptake of oxygen from the air. It is shown that the electrical properties of TaCN film are affected by the phase composition in the film. The effects of process parameters, such as deposition temperature, plasma power, and cycle time, on the film composition and electronic properties are evaluated. With the increase of the TaC and TaN phases over the Ta 3 N 5 phase, the resistivity of the film is decreased. As the deposition temperature, plasma power, and plasma cycle time are increased, the carbide and TaN phases in the film are increased and the film resistivity is decreased. The uptake of oxygen after deposition is up to 10 at.-%, and the resistivity of TaCN film deposited using PEALD is as low as 350 mV Á cm.

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“…This value is lower than the one expected from the formula , where is the capacitance per unit area, is the silicon dioxide permittivity, and is the effective oxide thickness. This is due to the polysilicon-gate depletion effect [8], [9], which results in an effective oxide thickness greater than the physical oxide thickness. Besides the high specific capacitance, MOS capacitors offer other advantages such as no extra costs and good matching [10], [11].…”

Section: A Capacitors In Submicron Cmos Processesmentioning

confidence: 99%

A large dynamic range radiation-tolerant analog memory in a quarter-micron CMOS technology

Anelli

Anghinolfi

Rivetti

2001

IEEE Trans. Nucl. Sci.

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Abstract-An analog memory prototype containing 8 128 cells has been designed in a commercial quarter-micron CMOS process. The aim of this work is to investigate the possibility of designing large dynamic range mixed-mode switched capacitor circuits for high-energy physics (HEP) applications in deep submicron CMOS technologies. Special layout techniques have been used to make the circuit radiation tolerant. The memory cells employ gate-oxide capacitors for storage, permitting a very high density. A voltage write-voltage read architecture has been chosen to minimize the sensitivity to absolute capacitor values. The measured input voltage range is 2.3 V (the power supply voltage is equal to 2.5 V), with a linearity of almost 8 bits over 2 V. The dynamic range is more than 11 bits. The pedestal variation is 0.5 mV peak-to-peak. The noise measured, which is dominated by the noise of the measurement setup, is around 0.8 mV rms. The characteristics of the memory have been measured before irradiation and after 100 kGy (SiO 2 ), and they do not degrade after irradiation.

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Modeling the polysilicon depletion effect and its impact on submicrometer CMOS circuit performance

Cited by 103 publications

References 15 publications

Accurate determination of ultrathin gate oxide thickness and effective polysilicon doping of CMOS devices

Accurate determination of ultrathin gate oxide thickness and effective polysilicon doping of CMOS devices

Formation of Tantalum Carbide and Nitride Phases in Atomic Layer Deposition Using Hydrogen Plasma and tert‐Butylimido‐tris(diethylamido)‐tantalum (TBTDET), and its Effect on Material Properties

A large dynamic range radiation-tolerant analog memory in a quarter-micron CMOS technology

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