Modeling Static Noise Margin for FinFET based SRAM PUFs

Masoumian, Shayesteh; Selimis, Georgios; Maes, Roel; Schrijen, Geert-Jan; Hamdioui, Said; Taouil, Mottaqiallah

doi:10.1109/ets48528.2020.9131583

Cited by 7 publications

(4 citation statements)

References 16 publications

(30 reference statements)

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“…The WCHD slightly decreases when the technology is scaled. Note that for smaller nodes the impact 1190 Design, Automation and Test in Europe Conference (DATE 2022) of process variation is larger and hence, more cells get a larger asymmetry; this results in more predictable startup values [18]. The slight variations in WCHD can be attributed to process variation and different noise levels in the different technologies.…”

Section: B Simulation Resultsmentioning

confidence: 99%

“…The WCHD analysis for both of them shows that the error in different conditions is less than the acceptable ECC capacity. In [18], the authors showed that the impact of temperature on static behavior of HP SRAM PUFs is higher than LP SRAM PUFs. In this work we have shown this subsequently leads to less noise in high-performance SRAM PUFs as compared to LP SRAM PUFs.…”

Section: Discussionmentioning

confidence: 99%

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Reliability Analysis of FinFET-Based SRAM PUFs for 16nm, 14nm, and 7nm Technology Nodes

Masoumian

Selimis

Wang

et al. 2022

2022 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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SRAM Physical Unclonable Functions (PUFs) are among other things today commercially used for secure primitives such as key generation and authentication. The quality of the PUFs and hence the security primitives, depends on intrinsic variations which are technology dependent. Therefore, to sustain the commercial usage of PUFs for cutting-edge technologies, it is important to properly model and evaluate their reliability. In this work, we evaluate the SRAM PUF reliability using within class Hamming distance (WCHD) for 16nm, 14nm, and 7nm using simulations and silicon validation for both low-power and high-performance designs. The results show that our simulation models and expectations match with the silicon measurements.From the experiments, we conclude the following: (1) SRAM PUF is reliable in advanced FinFET technology nodes, i.e., the noise is low in 16nm, 14nm, and 7nm, (2) temperature variations have a marginal impact on the reliability, and (3) both low-power and high-performance SRAMs can be used as a PUF without excessive need of error correcting codes (ECCs).

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Section: B Simulation Resultsmentioning

confidence: 99%

Section: Discussionmentioning

confidence: 99%

Reliability Analysis of FinFET-Based SRAM PUFs for 16nm, 14nm, and 7nm Technology Nodes

Masoumian

Selimis

Wang

et al. 2022

2022 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

Self Cite

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“…Highperformance SRAM PUF designs exhibit significantly reduced Hamming distance, ranging from 1 to 3 percent, in contrast to the 6 to 12 percent found in low-performance (LP) designs [13]. However, in [14], the authors showed that the impact of temperature on static behavior of HP SRAM PUFs is higher than LP SRAM PUFs.…”

Section: Existing Literature: Sram Puf Reliabilitymentioning

confidence: 97%

Accelerated Aging Effects on SRAM PUF reliability at various Temperature and Voltage conditions

Singh,

Bhatta,

Rahman

et al. 2023

Preprint

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This paper thoroughly investigates the trustworthiness of Static Random-Access Memory (SRAM) Physical Unclonable Functions (PUFs) within hardware security. It presents an overview of SRAM PUFs, their significance in hardware security, and their essential features. The paper explores the realms of evaluation metrics and practical examination of SRAM cell start-up values concerning an 8-bit SRAM dataset. Concurrently, it navigates the encountered challenges. A comprehensive pattern analysis of SRAM cell stability is discussed with accelerated aging. Compared the outputs at multiple trials to authenticate the result. The complex interplay of factors that affect the dependability of SRAM PUFs, encompassing environmental conditions, the accumulation of aging effects, and the complex landscape of process variations, is carefully explained and clarified. The paper concludes by summarizing key findings, emphasizing the importance of reliable hardware security, and suggesting future research directions for enhancing SRAM PUF reliability.

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“…Usually, manufacturers introduce different kinds of packaging to trade-off among cost, noise immunity, and supporting different operating conditions [51]. • Aging: Usually, the SRAM signature (PUF) can be characterized by P SN M noise (PUF SN M noise) [20], [52].…”

Section: A Sources Of Distinguishable Factorsmentioning

confidence: 99%

A Non-invasive Technique to Detect Authentic/Counterfeit SRAM Chips

Talukder¹,

Ferdaus²,

Rahman³

2021

Preprint

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Many commercially available memory chips are fabricated worldwide in untrusted facilities. Therefore, a counterfeit memory chip can easily enter into the supply chain in different formats. Deploying these counterfeit memory chips into an electronic system can severely affect security and reliability domains because of their sub-standard quality, poor performance, and shorter lifespan. Therefore, a proper solution is required to identify counterfeit memory chips before deploying them in mission-, safety-, and security-critical systems. However, a single solution to prevent counterfeiting is challenging due to the diversity of counterfeit types, sources, and refinement techniques. Besides, the chips can pass initial testing and still fail while being used in the system. Furthermore, existing solutions focus on detecting a single counterfeit type (e.g., detecting recycled memory chips). This work proposes a framework that detects major counterfeit static random-access memory (SRAM) types by attesting/identifying the origin of the manufacturer. The proposed technique generates a single signature for a manufacturer and does not require any exhaustive registration/authentication process. We validate our proposed technique using 345 SRAM chips produced by major manufacturers. The silicon results show that the test scores (F1 score) of our proposed technique of identifying memory manufacturer and part-number are 93% and 71%, respectively.

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Modeling Static Noise Margin for FinFET based SRAM PUFs

Cited by 7 publications

References 16 publications

Reliability Analysis of FinFET-Based SRAM PUFs for 16nm, 14nm, and 7nm Technology Nodes

Reliability Analysis of FinFET-Based SRAM PUFs for 16nm, 14nm, and 7nm Technology Nodes

Accelerated Aging Effects on SRAM PUF reliability at various Temperature and Voltage conditions

A Non-invasive Technique to Detect Authentic/Counterfeit SRAM Chips

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