Modeling of imprint in hysteresis loop of ferroelectric thin films with top and bottom interface layers

Abstract

The imprint of a ferroelectric thin film capacitor is studied using an improved model consisting of two nonswitching thin interface layers near the top and bottom electrodes. The difference in electrical conductivity between the two interface layers induces voltage offset and deformation behaviors in hysteresis loops. Size dependence of shift effect of Bi4−xNdxTi3O12 thin film is explained qualitatively by taking into account the thickness ratio of the interface layer and the bulk film. Various shifts and anamorphic shapes with different electrodes and processes have been effectively reproduced through changing the layer conductivities. The simulated shifted hysteresis loops agree well with the experiment. Theoretical prediction based on this approach may provide a method to reduce imprint failure.

Simulation of hysteresis loops for polycrystalline ferroelectrics by an extensive Landau-type model

“…What is the dynamic mechanism during switching a ferroelectric material? It is believed very difficult to model the hysteresis loop due to its nonlinear and history-dependent electric field effects although a number of models [13][14][15][16][17] oversimplified expressions that are insufficient for the unsaturated loops or numerical algorithms that are too complicated to be used for circuit simulation.…”

Enhanced multiferroic properties in epitaxial Yb-doped BiFeO3 thin films

“…In addition, small shifts in the hysteresis loops were observed because of an imprint effect due to the asymmetric electrode configuration of the top Pt electrode and bottom SrRuO 3 electrode. [38] The saturation polarization (P s ) of the BiFeO 3 and Bi 0.85 Yb 0.15 FeO 3 thin films were 58 and 86 μC/cm 2 respectively, which are slightly larger than the remanent polarizations. This is also related to the highly crystalline structures of these thin films.…”

Effect of electrode configurations on the process-induced imprint behavior of epitaxial Pb(Zr0.52Ti0.48)O3 capacitors

“…16 Recently, a theoretical model based on two interface layers of unequal conductivity was proposed, which results in both positive and negative voltage offsets. 17 Since the lattice mismatch can usually exist at both top and bottom interfaces of a heteroepitaxial ferroelectric capacitor, the asymmetry in lattice strain at the interfaces may lead to the difference in conductivity and thus to quite different imprint behaviors. In this letter, we use La 0.7 Sr 0.3 MnO 3 ͑L͒ and SrRuO 3 ͑S͒ as electrodes, The all-oxide PZT capacitors were grown on LSAT͑001͒ substrates by the pulsed laser deposition method.…”