2020 International Symposium on Electromagnetic Compatibility - EMC EUROPE 2020
DOI: 10.1109/emceurope48519.2020.9245681
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Modeling of Common-Mode Voltage Source for Multilevel Inverter Topologies

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Cited by 6 publications
(7 citation statements)
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“…In general, a higher blocking voltage results in increased switching loss (for a fixed current/voltage combination), which is due to the non-linear relation between the blocking voltage and switching energy (see Figure 3). This leads to a reduction in the efficiency of this topology for higher switching frequencies due the increased switching losses [29]. Because the overall goal generally is efficient converters, a lower switching frequency could be used to decrease the power losses.…”
Section: Two-level Topologies Standard Two-level Voltage Source Invertermentioning
confidence: 99%
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“…In general, a higher blocking voltage results in increased switching loss (for a fixed current/voltage combination), which is due to the non-linear relation between the blocking voltage and switching energy (see Figure 3). This leads to a reduction in the efficiency of this topology for higher switching frequencies due the increased switching losses [29]. Because the overall goal generally is efficient converters, a lower switching frequency could be used to decrease the power losses.…”
Section: Two-level Topologies Standard Two-level Voltage Source Invertermentioning
confidence: 99%
“…For two reasons, the application of emerging wide-bandgap (WBG) semiconductors in this two-level topology is challenging. First, one prominent advantage when applying WBG power semiconductors is the allowable decrease in the size of passive devices through a higher switching frequency [29]. Moreover, a high blocking voltage requirement limits the applicability of these promising technologies, which generally still have lower breakdown voltages compared to their silicon counterparts (see Table 1).…”
Section: Two-level Topologies Standard Two-level Voltage Source Invertermentioning
confidence: 99%
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“…A common-mode circuit model was obtained as presented in [15] and adapted for DC/DC converters. Inductances LCMi and LCMout, as well as the capacitances CCMi and CCMout shown in Fig.…”
Section: Common-mode Filtersmentioning
confidence: 99%
“…3, were found iteratively by comparing the currents calculated by the model with limits provided by EMI standards. Circuit parameters external to the converter are estimated by measurements in a real plant, or using FEM [15]. The inner parasitic elements can be estimated using a fixed mechanical structure, which is usually unfeasible in initial stages of the converter design.…”
Section: Common-mode Filtersmentioning
confidence: 99%