2018
DOI: 10.1002/cta.2568
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Modeling of CMS‐based nonuniform interconnects using FDTD technique

Abstract: This paper presents the finite-difference time-domain model of nonuniform interconnects including skin effect losses based on the current mode signaling (CMS). For accurate analysis, the nonlinear CMOS inverter is used as a driver for coupled nonuniform interconnects. These effects are incorporated in the proposed model using the modified alpha power law model. Additionally, high-frequency losses are incorporated in the proposed model that further improves the accuracy. Using the proposed model, the performanc… Show more

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Cited by 9 publications
(5 citation statements)
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References 35 publications
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“…From the results, it is noticed that the passive shielded MWCNT bundled interconnects shows high out‐phase delay and crosstalk noise compared to MLGNR interconnects. The finite difference time domain model can be applied for the proposed structures to verify the validity of the results 47 …”
Section: Extensions and Comparison With Mwcnt Interconnectionsmentioning
confidence: 98%
See 1 more Smart Citation
“…From the results, it is noticed that the passive shielded MWCNT bundled interconnects shows high out‐phase delay and crosstalk noise compared to MLGNR interconnects. The finite difference time domain model can be applied for the proposed structures to verify the validity of the results 47 …”
Section: Extensions and Comparison With Mwcnt Interconnectionsmentioning
confidence: 98%
“…The finite difference time domain model can be applied for the proposed structures to verify the validity of the results. 47 Moreover, the simultaneous switching effect on crosstalk and delay in proposed MLGNR interconnects for input transitions 0$1, 1$2, and 0$2 is investigated. 48 Figure 18 shows the obtained crosstalk noise analysis at different switching conditions.…”
Section: Extensions and Comparison With Mwcnt Interconnectionsmentioning
confidence: 99%
“…Given that, with the downscaling of CM OS and higher clock frequency, the need of higher frequency bandwidth and lower resistance are the main concerns in interconnects ' design. While the performance of copper being restrained by dispersion, signal degradation, skin effect, power electro magnetic interference and dissipation [1]. Therefore, the exploration and research of alternative materials for onchip interconnect lines are essential and necessary for future high performance and low power chips.…”
Section: Introductionmentioning
confidence: 99%
“…Scaling the Cu dimensions decreases the gate delay compared with the interconnect delay because of large resistance over the bulk value. 4,5 To avoid these effects, graphene has been introduced as a promising candidate to utilize as interconnect material. 6 In on-chip interconnects, the resistance of graphene is reduced as the number of graphene layers is increased.…”
Section: Introductionmentioning
confidence: 99%
“…Due to the advancement in semiconductor technology, it is required to scale the dimensions of Cu to achieve high performance and reliability. Scaling the Cu dimensions decreases the gate delay compared with the interconnect delay because of large resistance over the bulk value 4,5 …”
Section: Introductionmentioning
confidence: 99%